Invention Grant
- Patent Title: Wafer inspection system method
-
Application No.: US17724154Application Date: 2022-04-19
-
Publication No.: US12211200B2Publication Date: 2025-01-28
- Inventor: Chia-Lin Tsai , Hung-Ru Li , Wun-Ye Ku
- Applicant: NANYA TECHNOLOGY CORPORATION
- Applicant Address: TW New Taipei
- Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee Address: TW New Taipei
- Agency: MUNCY, GEISSLER, OLDS & LOWE, P.C.
- Main IPC: G06T7/00
- IPC: G06T7/00 ; G06V10/22

Abstract:
A wafer inspection method is provided. The wafer inspection method includes identifying a plurality of candidate regions on an image of a DUT on a wafer; generating a confidence score for each of the plurality of candidate regions, wherein the confidence score indicates a probability of a candidate region including a probe mark; selecting a first candidate region having the highest confidence score as a selected region; determining whether a second candidate region in the plurality of candidate regions includes the same probe mark as the first candidate region; and eliminating the second candidate region if the second candidate region includes the same probe mark as the first candidate region.
Public/Granted literature
- US20230334648A1 WAFER INSPECTION SYSTEM METHOD Public/Granted day:2023-10-19
Information query