Multilayer ceramic capacitor
    1.
    发明授权

    公开(公告)号:US10650976B2

    公开(公告)日:2020-05-12

    申请号:US16578440

    申请日:2019-09-23

    摘要: A multilayer ceramic capacitor includes a multilayer body including an inner layer section extending from an inner electrode positioned closest to a first principal surface of the multilayer body to an inner electrode positioned closest to a second principal surface of the multilayer body, and first and second principal surface-side outer layer sections positioned outside the inner layer section on the sides closer to the first and second principal surfaces, respectively. Sn is dissolved in a solid state in Ni of only the inner electrodes contacting the first and second principal surface-side outer layer sections, and a Sn content is not less than about 0.1 mol and not more than about 8.5 mol where a total of Ni and Sn in each of the inner electrodes contacting the first and second principal surface-side outer layer sections is 100 mol.

    Laminated ceramic capacitor and method for manufacturing laminated ceramic capacitor
    2.
    发明授权
    Laminated ceramic capacitor and method for manufacturing laminated ceramic capacitor 有权
    层叠陶瓷电容器及层叠陶瓷电容器的制造方法

    公开(公告)号:US09520231B2

    公开(公告)日:2016-12-13

    申请号:US14612505

    申请日:2015-02-03

    摘要: A laminated ceramic capacitor that includes a ceramic laminated body of a plurality of stacked ceramic dielectric layers, a plurality of internal electrodes opposed to each other with the ceramic dielectric layers interposed therebetween within the ceramic laminated body, and external electrodes provided on the outer surface of the ceramic laminated body and electrically connected to the internal electrodes. The internal electrodes contain Ni as a main constituent, and the Ni constituting the internal electrodes has a lattice constant in the range of 0.3250 nm to 0.3450 nm.

    摘要翻译: 一种层压陶瓷电容器,其包括多个层叠的陶瓷电介质层的陶瓷层叠体,在陶瓷层叠体内插入陶瓷电介质层的多个内部电极,并且设置在陶瓷层叠体的外表面上的外部电极 陶瓷层叠体,与内部电极电连接。 内部电极含有Ni作为主要成分,构成内部电极的Ni的晶格常数为0.3250nm〜0.3450nm。

    MULTILAYER CERAMIC CAPACITOR AND METHOD FOR PRODUCING THE SAME
    3.
    发明申请
    MULTILAYER CERAMIC CAPACITOR AND METHOD FOR PRODUCING THE SAME 审中-公开
    多层陶瓷电容器及其制造方法

    公开(公告)号:US20160358713A1

    公开(公告)日:2016-12-08

    申请号:US15163950

    申请日:2016-05-25

    CPC分类号: H01G4/30 H01G4/0085 H01G4/232

    摘要: A multilayer ceramic capacitor having inner electrodes containing at least one metal selected from Cu, Ag, Pd, Pt, Rh, Ir, Ru, and Os in an amount of 0.1 atom % or more that is dissolved in Ni and Sn to form a solid solution. The percentage of Sn with respect to the total amount of Ni and Sn in near-surface regions each located at a depth of 2 nm from a surface of the inner electrode in contact with an adjacent ceramic dielectric layer is 1.4 or more atom %, and X−Y≧1.0, where X represents the atomic percentage of Sn in the near-surface regions and Y represents the atomic percentage of Sn in mid-thickness regions of the inner electrodes. A method for producing a multilayer ceramic capacitor includes annealing the ceramic multilayer body to increase, in the inner electrodes, the percentage of Sn in the near-surface regions.

    摘要翻译: 一种多层陶瓷电容器,其具有含有选自Cu,Ag,Pd,Pt,Rh,Ir,Ru和Os中的至少一种选自Ni和Sn中的0.1原子%以上的金属的内电极,以形成固体 解。 相对于与相邻的陶瓷电介质层接触的内部电极的表面的距离为2nm的深度的近表面区域的Ni和Sn的总量,Sn的比例为1.4原子%以上, X-Y≥1.0,其中X表示近表面区域中的Sn的原子百分数,Y表示内部电极的中间厚度区域中的Sn的原子百分比。 制造多层陶瓷电容器的方法包括使陶瓷多层体退火,使内电极中的Sn附近的表面积增加。

    LAMINATED CERAMIC CAPACITOR AND METHOD FOR MANUFACTURING LAMINATED CERAMIC CAPACITOR
    6.
    发明申请
    LAMINATED CERAMIC CAPACITOR AND METHOD FOR MANUFACTURING LAMINATED CERAMIC CAPACITOR 有权
    层压陶瓷电容器及制造层压陶瓷电容器的方法

    公开(公告)号:US20150155098A1

    公开(公告)日:2015-06-04

    申请号:US14614476

    申请日:2015-02-05

    摘要: A laminated ceramic capacitor that includes a ceramic laminated body having a stacked plurality of ceramic dielectric layers and a plurality of internal electrodes opposed to each other with the ceramic dielectric layers interposed therebetween, and external electrodes on the outer surface of the ceramic laminated body and electrically connected to the internal electrodes. The internal electrodes contain Ni and Sn, a proportion of the Sn/(Ni+Sn) ratio is 0.001 or more in molar ratio is 75% or more in a region of the internal electrode at a depth of 20 nm from a surface opposed to the ceramic dielectric layer, and the proportion of the Sn/(Ni+Sn) ratio is 0.001 or more in molar ratio is less than 40% in a central region in a thickness direction of the internal electrode.

    摘要翻译: 一种层叠陶瓷电容器,其包括陶瓷层叠体,该陶瓷层叠体具有叠层的多个陶瓷电介质层和彼此相对的多个内部电极,陶瓷电介质层彼此间隔开,外部电极位于陶瓷层叠体的外表面, 连接到内部电极。 所述内部电极含有Ni和Sn,所述Sn /(Ni + Sn)比例的比例为0.001以上,所述内部电极的相对于与所述内部电极相反的表面的深度为20nm的区域为75%以上 陶瓷电介质层,并且在内部电极的厚度方向的中心区域中,Sn /(Ni + Sn)比例为0.001以上的摩尔比的比例小于40%。

    Multilayer ceramic capacitor
    8.
    发明授权

    公开(公告)号:US10468192B2

    公开(公告)日:2019-11-05

    申请号:US15873012

    申请日:2018-01-17

    摘要: A multilayer ceramic capacitor includes a multilayer body including an inner layer section extending from an inner electrode positioned closest to a first principal surface of the multilayer body to an inner electrode positioned closest to a second principal surface of the multilayer body, and first and second principal surface-side outer layer sections positioned outside the inner layer section on the sides closer to the first and second principal surfaces, respectively. Sn is dissolved in a solid state in Ni of only the inner electrodes contacting the first and second principal surface-side outer layer sections, and a Sn content is not less than about 0.1 mol and not more than about 8.5 mol where a total of Ni and Sn in each of the inner electrodes contacting the first and second principal surface-side outer layer sections is 100 mol.

    Laminated ceramic capacitor and method for manufacturing laminated ceramic capacitor

    公开(公告)号:US09837210B2

    公开(公告)日:2017-12-05

    申请号:US15004040

    申请日:2016-01-22

    摘要: A laminated ceramic capacitor having internal electrodes configured such that Sn is dissolved in Ni, and, in a region of each of the internal electrodes at a depth of 2 nm from a surface thereof facing a ceramic dielectric layer, a CV value representing variation of a Sn/(Ni+Sn) ratio (ratio of number of atoms) is less than or equal to 32%. As a conductive paste for forming the internal electrodes, a conductive paste containing a Ni powder and a tin oxide powder which is represented by SnO or SnO2 and has a specific surface area of more than or equal to 10 m2/g as determined by a BET method is used, or a conductive paste containing a Ni—Sn alloy powder is used, or a conductive paste containing a Ni—Sn alloy powder and a tin oxide powder which is represented by SnO or SnO2 and has a specific surface area of more than or equal to 10 m2/g is used.