Abstract:
A method for accelerating an operating system boot process is disclosed. In one exemplary embodiment, during a first operating system boot, information regarding the physical locations of disk access performed by the operating system to complete the boot are recorded and stored in a control data file. The control data file is used during a second operating system boot to predict which data will be required during the second operating system, and to populate a cache with that data. The cache can then be used to improve the second operating system boot to improve the boot time. In one embodiment, the information is independent of a file system of the operating system. In another embodiment, the cache can be populated by copying data from a mass storage device to a cache, and when the data is used, it can be moved from the cache to another cache.
Abstract:
A method for accelerating an operating system boot process is disclosed. In one exemplary embodiment, during a first operating system boot, information regarding the physical locations of disk access performed by the operating system to complete the boot are recorded and stored in a control data file. The control data file is used during a second operating system boot to predict which data will be required during the second operating system, and to populate a cache with that data. The cache can then be used to improve the second operating system boot to improve the boot time. In one embodiment, the information is independent of a file system of the operating system. In another embodiment, the cache can be populated by copying data from a mass storage device to a cache, and when the data is used, it can be moved from the cache to another cache.
Abstract:
Services for a personal electronic device are provided through which a form of background processing or multitasking is supported. The disclosed services permit user applications to take advantage of background processing without significant negative consequences to a user's experience of the foreground process or the personal electronic device's power resources. To effect the disclosed multitasking, one or more of a number of operational restrictions may be enforced. By way of example, thread priority levels may be overlapped between the foreground and background states. In addition, system resource availability may be restricted based on whether a process is receiving user input. In some instances, an application may be suspended rather than being placed into the background state. Implementation of the disclosed services may be substantially transparent to the executing user applications and, in some cases, may be performed without the user application's explicit cooperation.
Abstract:
In response to user action, lower priority tasks are scheduled as high priority tasks. This allows lower priority tasks to function even if a higher priority task has malfunctioned and starved the lower priority tasks of instructions. This advantageously provides the user with increased abilities to solve or work around malfunctioning tasks.
Abstract:
A two-level paging mechanism. The first level gathers data from reclaimable memory locations for a process and compacts the data into a single container. The second level sends the compact container's contents to a swap file and may use optimal I/O operations to the target memory device. On-demand paging is made possible by having a first pager locate the requested data in the compact container and then having a second pager retrieve the corresponding data from the swap file.
Abstract:
One embodiment of the present invention provides a system that uses an M-bit operating system (OS) kernel to support N-bit user processes. During operation, the system receives an exception. Note that the exception can be any event that needs to be handled by executing OS kernel code. Specifically, the exception can be a hardware interrupt, a software interrupt, an asynchronous interrupt, a synchronous interrupt, a signal, a trap, or a system call. Next, the system handles the exception by first switching the processor to the M-bit mode, and then executing M-bit OS kernel code which is designed to handle the exception. Note that the processor may primarily be designed to operate in the N-bit mode; the M-bit mode may primarily be provided for backward compatibility reasons.
Abstract:
A method and apparatus are provided for supplying a reliable and maintainable operating system in a net-booted environment. According to one embodiment, a network computer (NC) client boots from a boot image provided by an NC server. The boot image includes information identifying the location of one or more system volumes on the NC server that contain operating system software. In response to an attempt to modify the contents of the one or more system volumes, the NC client causes information identifying the modification to be recorded on the NC server separate from the one or more system volumes in a storage area associated with the NC client.
Abstract:
A composite memory device that includes different types of non-volatile memory devices, which have different performance characteristics, is described. This composite memory device may receive requests, a given one of which includes a command, a logical address for at least a block of data associated with the command, and a hint associated with the command. For the given request, the composite memory device executes the command on the block of data at the logical address in at least one of the types of non-volatile memory devices. Furthermore, the composite memory device conditionally executes the hint based on one or more criteria, such as: available memory in the types of non-volatile memory devices, traffic through an interface circuit in the composite memory device, operational states of the types of non-volatile memory devices, a target performance characteristic of the composite memory device, and an environmental condition of the composite memory device.
Abstract:
A method for resource management of a data processing system is described herein. According to one embodiment, a token is periodically pushed into a memory usage queue, where the token includes a timestamp indicating time entering the memory usage queue. The memory usage queue stores a plurality of memory page identifiers (IDs) identifying a plurality of memory pages currently allocated to a plurality of programs running within the data processing system. In response to a request to reduce memory usage, a token is popped from the memory usage queue. A timestamp of the popped token is then compared with current time to determine whether a memory usage reduction action should be performed.
Abstract:
A system and method are described for utilizing task urgency information when making power management decisions. For example, one embodiment of a method for managing power states of a processor comprises: executing a first power management state machine based on a first urgency level associated with a first task; detecting the execution of a second task having a second urgency level associated therewith; if the second urgency level is greater than the first urgency level, then executing a second power management state machine associated with the second urgency level.