Including performance-related hints in requests to composite memory
    1.
    发明授权
    Including performance-related hints in requests to composite memory 有权
    包括与复合内存请求中的性能相关提示

    公开(公告)号:US09417794B2

    公开(公告)日:2016-08-16

    申请号:US13191348

    申请日:2011-07-26

    Abstract: A composite memory device that includes different types of non-volatile memory devices, which have different performance characteristics, is described. This composite memory device may receive requests, a given one of which includes a command, a logical address for at least a block of data associated with the command, and a hint associated with the command. For the given request, the composite memory device executes the command on the block of data at the logical address in at least one of the types of non-volatile memory devices. Furthermore, the composite memory device conditionally executes the hint based on one or more criteria, such as: available memory in the types of non-volatile memory devices, traffic through an interface circuit in the composite memory device, operational states of the types of non-volatile memory devices, a target performance characteristic of the composite memory device, and an environmental condition of the composite memory device.

    Abstract translation: 描述了包括具有不同性能特征的不同类型的非易失性存储器件的复合存储器件。 该复合存储器设备可以接收请求,其中给定的一个包括命令,用于至少一个与命令相关联的数据块的逻辑地址以及与该命令相关联的提示。 对于给定的请求,复合存储器件在至少一种非易失性存储器件中的逻辑地址的数据块上执行命令。 此外,复合存储器设备基于一个或多个标准有条件地执行提示,例如:非易失性存储器件类型中的可用存储器,复合存储器件中的接口电路的业务,非类型的类型的操作状态 易失性存储器件,复合存储器件的目标性能特征以及复合存储器件的环境条件。

    TAG ALLOCATION FOR QUEUED COMMANDS ACROSS MULTIPLE DEVICES
    2.
    发明申请
    TAG ALLOCATION FOR QUEUED COMMANDS ACROSS MULTIPLE DEVICES 有权
    针对多个设备的警告命令的标签分配

    公开(公告)号:US20130054840A1

    公开(公告)日:2013-02-28

    申请号:US13215079

    申请日:2011-08-22

    Abstract: The disclosed embodiments provide a system that facilitates the processing of commands in a set of devices. The system includes a host bus adapter that provides an interface for connecting the set of devices to the host and manages the allocation of a set of tags to one or more of the devices. For each device connected to the host, the system also includes a queue-management apparatus that sends a tag request for the device to the host bus adapter. The queue-management apparatus then receives a subset of the tags for the device from the host bus adapter and uses the set of tags to queue commands from the host to the device and track the status of the queued commands.

    Abstract translation: 所公开的实施例提供了有助于处理一组设备中的命令的系统。 该系统包括主机总线适配器,其提供用于将该组设备连接到主机的接口,并管理一组标签到一个或多个设备的分配。 对于连接到主机的每个设备,系统还包括一个队列管理装置,该装置向该主机总线适配器发送该设备的标签请求。 队列管理装置然后从主机总线适配器接收用于设备的标签的子集,并且使用该组标签将来自主机的命令排队到设备并且跟踪排队的命令的状态。

    Using storage controller bus interfaces to secure data transfer between storage devices and hosts
    3.
    发明授权
    Using storage controller bus interfaces to secure data transfer between storage devices and hosts 有权
    使用存储控制器总线接口来保护存储设备和主机之间的数据传输

    公开(公告)号:US09152825B2

    公开(公告)日:2015-10-06

    申请号:US13408725

    申请日:2012-02-29

    CPC classification number: G06F21/85

    Abstract: The disclosed embodiments provide a system that secures data transfer between a storage device and a host. During operation, the system obtains an input/output (I/O) command and an encryption context associated with the I/O command from a device driver executing on the host. Next, the system uses a storage controller bus interface between the host and the storage device to apply the encryption context to data associated with the I/O command, wherein the encryption context enables transmission of an encrypted form of the data between the storage device and the host. Finally, the system uses the storage controller bus interface to issue the I/O command to the storage device, wherein the I/O command is processed by the storage device.

    Abstract translation: 所公开的实施例提供了一种确保存储设备和主机之间的数据传输的系统。 在操作期间,系统从主机上执行的设备驱动程序获取与I / O命令相关联的输入/输出(I / O)命令和加密上下文。 接下来,系统使用主机和存储设备之间的存储控制器总线接口将加密上下文应用于与I / O命令相关联的数据,其中加密上下文使得能够在存储设备与存储设备之间传输数据的加密形式 主人。 最后,系统使用存储控制器总线接口向存储设备发出I / O命令,其中I / O命令由存储设备处理。

    SIMULTANEOUS DATA TRANSFER AND ERROR CONTROL TO REDUCE LATENCY AND IMPROVE THROUGHPUT TO A HOST
    4.
    发明申请
    SIMULTANEOUS DATA TRANSFER AND ERROR CONTROL TO REDUCE LATENCY AND IMPROVE THROUGHPUT TO A HOST 有权
    同时进行数据传输和错误控制以减少延迟并将其改善到主机

    公开(公告)号:US20130061111A1

    公开(公告)日:2013-03-07

    申请号:US13224714

    申请日:2011-09-02

    CPC classification number: H04L1/08 G06F11/10 H04L1/004

    Abstract: The disclosed embodiments provide a system that transfers data from a storage device to a host. The system includes a communication mechanism that receives a request to read a set of blocks from the host. Next, upon reading each block from the set of blocks from the storage device, the communication mechanism transfers the block over an interface with the host. The system also includes an error-detection apparatus that performs error detection on the block upon reading the block, and an error-correction apparatus that performs error correction on the block if an error is detected in the block. The communication mechanism may then retransfer the block to the host after the error is removed from the block.

    Abstract translation: 所公开的实施例提供了将数据从存储设备传送到主机的系统。 该系统包括一个通信机制,其接收从主机读取一组块的请求。 接下来,在从存储装置读取块集合中的每个块时,通信机制通过与主机的接口传送块。 该系统还包括在读取该块时对块执行错误检测的错误检测装置,以及如果在该块中检测到错误则对该块执行错误校正的纠错装置。 然后,在从块中移除错误之后,通信机制可以将块重新传送到主机。

    Tag allocation for queued commands across multiple devices
    5.
    发明授权
    Tag allocation for queued commands across multiple devices 有权
    跨多个设备的排队命令的标签分配

    公开(公告)号:US08661163B2

    公开(公告)日:2014-02-25

    申请号:US13215079

    申请日:2011-08-22

    Abstract: The disclosed embodiments provide a system that facilitates the processing of commands in a set of devices. The system includes a host bus adapter that provides an interface for connecting the set of devices to the host and manages the allocation of a set of tags to one or more of the devices. For each device connected to the host, the system also includes a queue-management apparatus that sends a tag request for the device to the host bus adapter. The queue-management apparatus then receives a subset of the tags for the device from the host bus adapter and uses the set of tags to queue commands from the host to the device and track the status of the queued commands.

    Abstract translation: 所公开的实施例提供了有助于处理一组设备中的命令的系统。 该系统包括主机总线适配器,其提供用于将该组设备连接到主机的接口,并管理一组标签到一个或多个设备的分配。 对于连接到主机的每个设备,系统还包括一个队列管理装置,该装置向该主机总线适配器发送该设备的标签请求。 队列管理装置然后从主机总线适配器接收用于设备的标签的子集,并且使用该组标签将来自主机的命令排队到设备并且跟踪排队的命令的状态。

    Simultaneous data transfer and error control to reduce latency and improve throughput to a host
    6.
    发明授权
    Simultaneous data transfer and error control to reduce latency and improve throughput to a host 有权
    同时进行数据传输和错误控制,以减少主机的延迟并提高吞吐量

    公开(公告)号:US08656251B2

    公开(公告)日:2014-02-18

    申请号:US13224714

    申请日:2011-09-02

    CPC classification number: H04L1/08 G06F11/10 H04L1/004

    Abstract: The disclosed embodiments provide a system that transfers data from a storage device to a host. The system includes a communication mechanism that receives a request to read a set of blocks from the host. Next, upon reading each block from the set of blocks from the storage device, the communication mechanism transfers the block over an interface with the host. The system also includes an error-detection apparatus that performs error detection on the block upon reading the block, and an error-correction apparatus that performs error correction on the block if an error is detected in the block. The communication mechanism may then retransfer the block to the host after the error is removed from the block.

    Abstract translation: 所公开的实施例提供了将数据从存储设备传送到主机的系统。 该系统包括一个通信机制,其接收从主机读取一组块的请求。 接下来,在从存储装置读取块集合中的每个块时,通信机制通过与主机的接口传送块。 该系统还包括在读取该块时对块执行错误检测的错误检测装置,以及如果在该块中检测到错误则对该块执行错误校正的纠错装置。 然后,在从块中移除错误之后,通信机制可以将块重新传送到主机。

    USING STORAGE CONTROLLER BUS INTERFACES TO SECURE DATA TRANSFER BETWEEN STORAGE DEVICES AND HOSTS
    7.
    发明申请
    USING STORAGE CONTROLLER BUS INTERFACES TO SECURE DATA TRANSFER BETWEEN STORAGE DEVICES AND HOSTS 有权
    使用存储控制器总线接口来保护存储设备和主机之间的数据传输

    公开(公告)号:US20130227301A1

    公开(公告)日:2013-08-29

    申请号:US13408725

    申请日:2012-02-29

    CPC classification number: G06F21/85

    Abstract: The disclosed embodiments provide a system that secures data transfer between a storage device and a host. During operation, the system obtains an input/output (I/O) command and an encryption context associated with the I/O command from a device driver executing on the host. Next, the system uses a storage controller bus interface between the host and the storage device to apply the encryption context to data associated with the I/O command, wherein the encryption context enables transmission of an encrypted form of the data between the storage device and the host. Finally, the system uses the storage controller bus interface to issue the I/O command to the storage device, wherein the I/O command is processed by the storage device.

    Abstract translation: 所公开的实施例提供了一种确保存储设备和主机之间的数据传输的系统。 在操作期间,系统从主机上执行的设备驱动程序获取与I / O命令相关联的输入/输出(I / O)命令和加密上下文。 接下来,系统使用主机和存储设备之间的存储控制器总线接口将加密上下文应用于与I / O命令相关联的数据,其中加密上下文使得能够在存储设备与存储设备之间传输数据的加密形式 主人。 最后,系统使用存储控制器总线接口向存储设备发出I / O命令,其中I / O命令由存储设备处理。

    INCLUDING PERFORMANCE-RELATED HINTS IN REQUESTS TO COMPOSITE MEMORY
    8.
    发明申请
    INCLUDING PERFORMANCE-RELATED HINTS IN REQUESTS TO COMPOSITE MEMORY 有权
    包括与复合存储器相关的性能相关信息

    公开(公告)号:US20130031298A1

    公开(公告)日:2013-01-31

    申请号:US13191348

    申请日:2011-07-26

    Abstract: A composite memory device that includes different types of non-volatile memory devices, which have different performance characteristics, is described. This composite memory device may receive requests, a given one of which includes a command, a logical address for at least a block of data associated with the command, and a hint associated with the command. For the given request, the composite memory device executes the command on the block of data at the logical address in at least one of the types of non-volatile memory devices. Furthermore, the composite memory device conditionally executes the hint based on one or more criteria, such as: available memory in the types of non-volatile memory devices, traffic through an interface circuit in the composite memory device, operational states of the types of non-volatile memory devices, a target performance characteristic of the composite memory device, and an environmental condition of the composite memory device.

    Abstract translation: 描述了包括具有不同性能特征的不同类型的非易失性存储器件的复合存储器件。 该复合存储器设备可以接收请求,其中给定的一个包括命令,用于至少一个与命令相关联的数据块的逻辑地址以及与该命令相关联的提示。 对于给定的请求,复合存储器件在至少一种非易失性存储器件中的逻辑地址的数据块上执行命令。 此外,复合存储器设备基于一个或多个标准有条件地执行提示,例如:非易失性存储器件类型中的可用存储器,复合存储器件中的接口电路的业务,非类型的类型的操作状态 易失性存储器件,复合存储器件的目标性能特征以及复合存储器件的环境条件。

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