公开(公告)号：US20240370364A1

公开(公告)日：2024-11-07

申请号：US18633288

申请日：2024-04-11

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Yu-Chung Lien ,  Zhongguang Xu ,  Peng Zhang ,  Zhenming Zhou

IPC: G06F12/02

Abstract: A system includes a memory device and a processing device, operatively coupled with the memory device, to perform operations including: identifying a block of the memory device, the block spanning over a plurality of decks; determining whether a set of memory cells of the memory device is disposed in a first deck of the block or a second deck of the block, the first deck having a memory reliability metric satisfying a first criterion pertaining to a reliability of a deck, and the second deck having a memory reliability metric not satisfying the first criterion; selecting, based on the determination, an erase policy for performing an erase operation with respect to the set of memory cells; and causing the erase operation to be performed with respect to the set of memory cells in accordance with the erase policy.

公开(公告)号：US20240231666A1

公开(公告)日：2024-07-11

申请号：US18617430

申请日：2024-03-26

Applicant: Micron Technology, Inc.

Inventor： Peng Zhang ,  Murong Lang ,  Christina Papagianni ,  Zhenming Zhou

IPC: G06F3/06

CPC classification number: G06F3/0644 ,  G06F3/0604 ,  G06F3/0655 ,  G06F3/0679

Abstract: Aspects of the present disclosure configure a system component, such as memory sub-system controller, to perform empty page scan operations. The controller selects a portion of the set of memory components that is empty and ready to be programmed. The controller reads one or more signals from the selected portion of the set of memory components. The controller generates an error count value representing whether the portion of the set of memory components is valid for programming based on a result of reading the one or more signals from the selected portion. The controller updates a scan frequency for performing the empty page scan operations for the portion of the set of memory components based on the error count value.

公开(公告)号：US11960745B2

公开(公告)日：2024-04-16

申请号：US17889757

申请日：2022-08-17

Applicant: Micron Technology, Inc.

Inventor： Peng Zhang ,  Murong Lang ,  Christina Papagianni ,  Zhenming Zhou

IPC: G06F3/06

CPC classification number: G06F3/0644 ,  G06F3/0604 ,  G06F3/0655 ,  G06F3/0679

Abstract: Aspects of the present disclosure configure a system component, such as memory sub-system controller, to perform empty page scan operations. The controller selects a portion of the set of memory components that is empty and ready to be programmed. The controller reads one or more signals from the selected portion of the set of memory components. The controller generates an error count value representing whether the portion of the set of memory components is valid for programming based on a result of reading the one or more signals from the selected portion. The controller updates a scan frequency for performing the empty page scan operations for the portion of the set of memory components based on the error count value.

公开(公告)号：US20240319886A1

公开(公告)日：2024-09-26

申请号：US18421893

申请日：2024-01-24

Applicant: Micron Technology, Inc.

Inventor： Peng Zhang ,  Lei Lin ,  Hanping Chen ,  Li-Te Chang ,  Zhengang Chen ,  Murong Lang ,  Zhenming Zhou

IPC: G06F3/06

CPC classification number: G06F3/0614 ,  G06F3/0652 ,  G06F3/0679

Abstract: A method for receiving a request for performing a programming operation on one or more memory blocks of a memory device, identifying a value of a media endurance metric associated with the one or more memory blocks, determining a programming voltage offset corresponding to the value of the media endurance metric, and performing, using the programming voltage offset, the programming operation on the one or more memory blocks. The method further includes identifying a program-verify voltage level associated with the one or more memory blocks, determining a program-verify voltage offset associated with the program-verify voltage level and the value of the media endurance metric, and performing, using the program-verify voltage level and the program-verify voltage offset, a program-verify operation on the one or more memory blocks.

公开(公告)号：US20240248612A1

公开(公告)日：2024-07-25

申请号：US18406852

申请日：2024-01-08

Applicant: Micron Technology, Inc.

Inventor： Lei Lin ,  Peng Zhang ,  Pitamber Shukla ,  Zhengang Chen ,  Zhenming Zhou

IPC: G06F3/06

CPC classification number: G06F3/0619 ,  G06F3/0659 ,  G06F3/0679

Abstract: Aspects of the present disclosure configure a system component, such as a memory sub-system controller, to modify pulses used to program memory components. The controller receives a request to program data in an individual memory component of a set of memory components. The controller computes a plurality of memory reliability criteria associated with the individual memory component and compares the plurality of memory reliability criteria to one or more threshold values. The controller selects a program pulse used to program the data to the individual memory component based on a result of comparing the plurality of memory reliability criteria to the one or more threshold values.

公开(公告)号：US20240061600A1

公开(公告)日：2024-02-22

申请号：US17889757

申请日：2022-08-17

Applicant: Micron Technology, Inc.

Inventor： Peng Zhang ,  Murong Lang ,  Christina Papagianni ,  Zhenming Zhou

IPC: G06F3/06

CPC classification number: G06F3/0644 ,  G06F3/0655 ,  G06F3/0604 ,  G06F3/0679

Abstract: Aspects of the present disclosure configure a system component, such as memory sub-system controller, to perform empty page scan operations. The controller selects a portion of the set of memory components that is empty and ready to be programmed. The controller reads one or more signals from the selected portion of the set of memory components. The controller generates an error count value representing whether the portion of the set of memory components is valid for programming based on a result of reading the one or more signals from the selected portion. The controller updates a scan frequency for performing the empty page scan operations for the portion of the set of memory components based on the error count value.

公开(公告)号：US20250069675A1

公开(公告)日：2025-02-27

申请号：US18774642

申请日：2024-07-16

Applicant: Micron Technology, Inc.

Inventor： Daniel Zhang ,  Yu-Chung Lien ,  Peng Zhang ,  Murong Lang ,  Zhenming Zhou

IPC: G11C16/34 ,  G11C16/10 ,  G11C16/32

Abstract: The disclosure configures a memory sub-system controller to use prior read verify operations to selectively apply enhancements to read window budgets (RWB). The controller receives a request to perform a memory operation on data stored in an individual memory component of a set of memory components. The controller accesses RWB tracking information associated with the individual memory component and determines that the tracking information associated with the individual memory component indicates a need for enhancing a RWB associated with the memory operation. The controller applies one or more enhancement processes to the individual memory component in response to determining that the tracking information associated with the individual memory component indicates the need for enhancing the RWB associated with the memory operation.

公开(公告)号：US20240420784A1

公开(公告)日：2024-12-19

申请号：US18739769

申请日：2024-06-11

Applicant: Micron Technology, Inc.

Inventor： Murong Lang ,  Peng Zhang ,  Lei Lin ,  Zhenming Zhou ,  Jun Wan

IPC: G11C16/34 ,  G11C16/10

Abstract: Aspects of the present disclosure configure a memory sub-system controller to selectively adjust a program pulse for different word line groups of a memory sub-system. The controller receives a request to program data to an individual memory component of a set of memory components. The controller determines that a program erase count (PEC) associated with the individual memory component transgresses a threshold value. The controller, in response to determining that the PEC associated with the individual memory component transgresses the threshold value, selectively adjusts a predetermined program voltage (Vpgm) associated with a subset of word lines (WLs) of the individual memory component based on whether the subset of WLs is associated with an individual WL group (WLG). The controller programs the data to the individual memory component according to the selectively adjusted predetermined Vpgm.

公开(公告)号：US20240371450A1

公开(公告)日：2024-11-07

申请号：US18637412

申请日：2024-04-16

Applicant: Micron Technology, Inc.

Inventor： Peng Zhang ,  Lei Lin ,  Zhengang Chen ,  Murong Lang ,  Zhenming Zhou

IPC: G11C16/34 ,  G11C16/08 ,  G11C16/26

Abstract: A system including a memory device and an operatively coupled processing device to perform operations including: responsive to detecting a power-up event, performing a first read strobe on a first set of a plurality of memory cells addressable by a first wordline, determining a value of a conductivity metric reflecting conductive states of one or more bitlines connected to the first set of the plurality of memory cells, determining, based on the value of the conductivity metric, a read level offset value for a second wordline, wherein the second wordline is adjacent to the first wordline, performing, using the read level offset value, a second read strobe on the second wordline, and responsive to determining that a value of a quality metric produced by the second read strobe satisfies a quality criterion, indicating that a programming operation performed on the second wordline was completed before a power off event.