公开(公告)号：US20250140713A1

公开(公告)日：2025-05-01

申请号：US18673383

申请日：2024-05-24

Applicant: Microchip Technology Incorporated

Inventor： Shesh Mani Pandey ,  Randy L. Yach ,  Bruce Odekirk ,  George Dorman ,  Gary Frazier

IPC: H01L23/00 ,  H01L23/31 ,  H01L29/06

Abstract: A moisture resistant semiconductor device may include a substrate and a plurality of terminations in the substrate of the semiconductor device, wherein the plurality of terminations are laterally adjacent to an active region of the semiconductor device. A first insulating layer which overlays the plurality of terminations and the substrate. A trench into the substrate located laterally beyond an edge of the plurality of terminations. A contact layer which overlays the first insulating layer. A second insulating layer which overlays the contact layer. The second insulating layer which overlays the trench. A third insulating layer which overlays the second insulating layer.

公开(公告)号：US20250107211A1

公开(公告)日：2025-03-27

申请号：US18891966

申请日：2024-09-20

Applicant: Microchip Technology Incorporated

Inventor： Shesh Mani Pandey ,  Randy L. Yach ,  Bruce Odekirk

IPC: H01L29/49 ,  H01L29/06 ,  H01L29/08 ,  H01L29/808

Abstract: A semiconductor device is provided. The semiconductor device may include a silicon carbide substrate, a silicon layer formed at a first side of the silicon carbide substrate, a gate oxide layer formed on the silicon layer, a gate terminal formed on the gate oxide layer, a drain terminal formed at a second side of the silicon carbide substrate opposite the first side, and a source terminal formed at the first side of the silicon carbide substrate, and at opposite ends of the silicon layer.

公开(公告)号：US20250107194A1

公开(公告)日：2025-03-27

申请号：US18891853

申请日：2024-09-20

Applicant: Microchip Technology Incorporated

Inventor： Shesh Mani Pandey ,  Bruce Odekirk ,  Sami El Hageali

IPC: H01L29/16 ,  H01L21/02

Abstract: A method of manufacturing a semiconductor device is provided. The method may include implanting a silicon-rich layer on a surface of a silicon carbide substrate, and growing a gate oxide layer on the silicon-rich layer on the surface of the silicon carbide substrate.

公开(公告)号：US20250112035A1

公开(公告)日：2025-04-03

申请号：US18401902

申请日：2024-01-02

Applicant: Microchip Technology Incorporated

Inventor： Steve Nagel ,  Bomy Chen ,  Bruce Odekirk ,  Pejman Khosropour ,  Robin Liu ,  Andy Tu ,  Thomas Krutsick

IPC: H01L21/02 ,  H01L29/04 ,  H01L29/16 ,  H01L29/20

Abstract: A method includes performing a pressing operation on a volume of silicon carbide (SiC) powder to form a polycrystalline SiC (poly-SiC) ingot, and divide the poly-SiC ingot into a plurality of poly-SiC wafer bases. The method further includes, for a respective poly-SiC wafer base, bonding a silicon (Si) wafer structure to the respective poly-SiC wafer base to define a hybrid Si/poly-SiC stack structure, and performing a dividing process to remove a partial thickness of the Si wafer structure from the hybrid Si/poly-SiC stack structure to provide a hybrid Si/poly-SiC wafer comprising a remaining portion of the Si wafer structure bonded to the respective poly-SiC wafer base.

公开(公告)号：US20250054761A1

公开(公告)日：2025-02-13

申请号：US18676191

申请日：2024-05-28

Applicant: Microchip Technology Incorporated

Inventor： Shesh Mani Pandey ,  Bruce Odekirk

IPC: H01L21/04 ,  H01L29/16 ,  H01L29/51

Abstract: A semiconductor device that may include a silicon carbide substrate, a silicon layer disposed on the silicon carbide substrate, and a gate oxide layer disposed on the silicon layer. The silicon layer may be implanted within the silicon carbide substrate. The silicon layer may comprise a thickness of 100 angstroms 5000 angstroms. The silicon layer may contain less than one percent carbon, or may contain a certain percentage of carbon that decreases as a distance from the surface of the silicon carbide substrate increases.

公开(公告)号：US20250120145A1

公开(公告)日：2025-04-10

申请号：US18736957

申请日：2024-06-07

Applicant: Microchip Technology Incorporated

Inventor： Shesh Mani Pandey ,  Randy L. Yach ,  Bruce Odekirk

IPC: H01L29/10 ,  H01L21/04 ,  H01L21/8234 ,  H01L29/08 ,  H01L29/66

Abstract: A transistor that may include a substrate, a drain layer formed within the substrate at a first side of the substrate. A first well implant having a first implant depth, a second well implant having a second implant depth and a third well implant having a third implant depth. The first well implant, the second well implant and the third well implant formed within the substrate at the second side of the substrate. The second implant depth is greater than the first implant depth and the third implant depth is greater than the second implant depth. A gate formed at the second side of the substrate. The gate overlaps the first well implant by a first distance, the gate overlaps the second well implant by a second distance and the gate overlaps the third well implant by a third distance.

公开(公告)号：US20250089282A1

公开(公告)日：2025-03-13

申请号：US18733611

申请日：2024-06-04

Applicant: Microchip Technology Incorporated

Inventor： Shesh Mani Pandey ,  Bruce Odekirk

IPC: H01L29/872 ,  H01L29/06 ,  H01L29/167 ,  H01L29/66

Abstract: A diode that may include a substrate with a cathode terminal on a first surface of the substrate. An anode terminal on a second surface of the substrate. An implant portion disposed within the substrate.