公开(公告)号：US11558637B1

公开(公告)日：2023-01-17

申请号：US16716001

申请日：2019-12-16

申请人： Meta Platforms, Inc.

发明人： Xianliang Zha ,  Harikrishna Madadi Reddy ,  Junqiang Lan ,  Sujith Srinivasan ,  Chung-Fu Lin ,  Guogang Hua

IPC分类号： H04N19/56 ,  H04N19/132 ,  H04N19/139 ,  H04N19/176 ,  H04N19/105 ,  H04N19/43

摘要： A system comprises a memory storage configured to store at least a portion of a frame of a video and a hardware motion estimation search processing unit configured to perform at least a portion of a motion estimation search for the video for a plurality of different block sizes. The hardware motion estimation search processing unit is configured to perform the motion estimation search using a plurality of source sub-blocks of a first block size to determine a first type of comparison evaluation values for the first block size. A combination of values included in the first type of comparison evaluation values is utilized to determine at least one second type of comparison evaluation values for a second block size, wherein the second block size is larger than the first block size.

公开(公告)号：US11234017B1

公开(公告)日：2022-01-25

申请号：US16714403

申请日：2019-12-13

申请人： Meta Platforms, Inc.

发明人： Harikrishna Madadi Reddy ,  Xianliang Zha ,  Junqiang Lan ,  Sujith Srinivasan ,  Guogang Hua ,  Chung-Fu Lin

IPC分类号： H04N19/53 ,  H04N19/43

摘要： A system comprises a source block buffer and a plurality of hardware motion estimation search processing units in communication with the source block buffer. The source block buffer is configured to store at least a portion of a source block of a source frame of a video. The plurality of hardware motion estimation search processing units are configured to perform at least a portion of a motion estimation for the source block at least in part in parallel across a plurality of different reference frames of the video. Each of the hardware motion estimation search processing units is configured to be assigned a different one of the plurality of different reference frames and is configured to compare at least the portion of the source block with a portion of the assigned one of the different reference frames.

公开(公告)号：US20240056601A1

公开(公告)日：2024-02-15

申请号：US17554798

申请日：2021-12-17

申请人： Meta Platforms, Inc.

发明人： Harikrishna Madadi Reddy ,  Xianliang Zha ,  Junqiang Lan ,  Sujith Srinivasan ,  Guogang Hua ,  Chung-Fu Lin

IPC分类号： H04N19/53 ,  H04N19/43

CPC分类号： H04N19/53 ,  H04N19/43

摘要： A system comprises a source block buffer and a plurality of hardware motion estimation search processing units in communication with the source block buffer. The source block buffer is configured to store at least a portion of a source block of a source frame of a video. The plurality of hardware motion estimation search processing units are configured to perform at least a portion of a motion estimation for the source block at least in part in parallel across a plurality of different reference frames of the video.

公开(公告)号：US11683509B1

公开(公告)日：2023-06-20

申请号：US17513770

申请日：2021-10-28

申请人： Meta Platforms, Inc.

发明人： Xianliang Zha ,  Yunqing Chen ,  Shiyan Pan ,  Harikrishna Madadi Reddy

IPC分类号： H04N7/12 ,  H04N19/423 ,  H04N19/172 ,  H04N19/169 ,  H04N19/18

CPC分类号： H04N19/423 ,  H04N19/172 ,  H04N19/18 ,  H04N19/188

摘要： Techniques for detecting skipped prediction units in an encoder are disclosed. Control information associated with a prediction unit of a video frame is received at a node of a video encoding pipeline used to compress the video frame. A skip decision for the prediction unit is made by analyzing transform units comprising the prediction unit. The skip decision indicates whether or not the prediction unit comprises a skipped prediction unit during encoding. The skip decision for the prediction unit is provided to a downstream node of the video encoding pipeline.

公开(公告)号：US11669281B1

公开(公告)日：2023-06-06

申请号：US17531393

申请日：2021-11-19

申请人： Meta Platforms, Inc.

发明人： Xianliang Zha ,  Yunqing Chen ,  Shiyan Pan ,  Harikrishna Madadi Reddy

IPC分类号： G06F3/06 ,  G11C7/10

CPC分类号： G06F3/0673 ,  G06F3/0625 ,  G06F3/0637 ,  G11C7/1039

摘要： A count circuit for symbol statistics is disclosed that is configured to read from an address of a buffer memory a count value stored at the address in response to receiving a first of a plurality of input values comprising the address, serially increment the count value for each of the received plurality of input values comprising the address, and write an incremented count value at the address of the buffer memory after a last of the plurality of input values comprising the address has been counted. Reading from the buffer memory is disabled for all but the first of the plurality of input values comprising the address. Writing to the buffer memory is disabled for all but the last of the plurality of input values comprising the address.