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    Cross-channel network operation offloading for collective operations
    1.
    发明授权
    Cross-channel network operation offloading for collective operations 有权
    跨渠道网络运营卸载集体运营

    公开(公告)号：US09344490B2

    公开(公告)日：2016-05-17

    申请号：US14324246

    申请日：2014-07-07

    Applicant: MELLANOX TECHNOLOGIES LTD.

    Inventor： Noam Bloch ,  Gil Bloch ,  Ariel Shachar ,  Hillel Chapman ,  Ishai Rabinobitz ,  Pavel Shamis ,  Gilad Shainer

    IPC: G06F9/54 ,  H04L29/08

    CPC classification number: H04L67/10 ,  G06F9/546 ,  G06F2209/509

    Abstract: A Network Interface (NI) includes a host interface, which is configured to receive from a host processor of a node one or more cross-channel work requests that are derived from an operation to be executed by the node. The NI includes a plurality of work queues for carrying out transport channels to one or more peer nodes over a network. The NI further includes control circuitry, which is configured to accept the cross-channel work requests via the host interface, and to execute the cross-channel work requests using the work queues by controlling an advance of at least a given work queue according to an advancing condition, which depends on a completion status of one or more other work queues, so as to carry out the operation.

    Abstract translation: 网络接口（NI）包括主机接口，其被配置为从节点的主机处理器接收从要由节点执行的操作导出的一个或多个跨通道工作请求。 NI包括用于通过网络向一个或多个对等节点执行传输信道的多个工作队列。 NI还包括控制电路，其被配置为经由主机接口接受跨通道工作请求，并且通过根据一个或多个控制电路控制至少一个给定的工作队列的前进来执行使用工作队列的跨通道工作请求 这取决于一个或多个其他工作队列的完成状态，以便执行操作。

    Reducing size of completion notifications
    2.
    发明申请
    Reducing size of completion notifications 有权
    减少完成通知的大小

    公开(公告)号：US20140143454A1

    公开(公告)日：2014-05-22

    申请号：US13682772

    申请日：2012-11-21

    Applicant: MELLANOX TECHNOLOGIES LTD.

    Inventor： Ofer Hayut ,  Noam Bloch ,  Michael Kagan ,  Ariel Shachar

    IPC: G06F3/01

    CPC classification number: G06F3/016 ,  G06F13/128 ,  G06F13/14

    Abstract: A computer peripheral device includes a host interface, which is configured to communicate over a bus with a host processor and with a system memory of the host processor. Processing circuitry in the peripheral device is configured to receive and execute work items submitted to the peripheral device by client processes running on the host processor, and responsively to completing execution of the work items, to write completion reports to the system memory, including first completion reports of a first data size and second completion reports of a second data size, which is smaller than the first data size.

    Abstract translation: 计算机外围设备包括主机接口，其被配置为通过总线与主处理器和主机处理器的系统存储器进行通信。 外围设备中的处理电路被配置为通过在主处理器上运行的客户端进程来接收和执行提交给外围设备的工作项目，并响应于完成工作项目的执行，将完成报告写入系统存储器，包括首次完成 报告第一数据大小和第二数据大小的第二完成报告，其小于第一数据大小。

    NIC with switching functionality between network ports
    3.
    发明授权
    NIC with switching functionality between network ports 有权

    公开(公告)号：US10454991B2

    公开(公告)日：2019-10-22

    申请号：US14658260

    申请日：2015-03-16

    Applicant: Mellanox Technologies Ltd.

    Inventor： Noam Bloch ,  Ariel Shachar ,  Michael Kagan ,  Lior Narkis ,  Shlomo Raikin

    IPC: H04L29/08 ,  G06F9/455

    Abstract: A network interface device includes a host interface for connection to a host processor and a network interface, which is configured to transmit and receive data packets over a network, and which comprises multiple distinct physical ports configured for connection to the network. Processing circuitry is configured to receive, via one of the physical ports, a data packet from the network and to decide, responsively to a destination identifier in the packet, whether to deliver a payload of the data packet to the host processor via the host interface or to forward the data packet to the network via another one of the physical ports.

    Handling transport layer operations received out of order
    4.
    发明授权
    Handling transport layer operations received out of order 有权

    公开(公告)号：US10110518B2

    公开(公告)日：2018-10-23

    申请号：US14132014

    申请日：2013-12-18

    Applicant: Mellanox Technologies Ltd.

    Inventor： Idan Burstein ,  Michael Kagan ,  Noam Bloch ,  Ariel Shachar ,  Hillel Chapman ,  Dror Bohrer ,  Diego Crupnicoff

    IPC: H04L12/861 ,  H04L12/879 ,  H04L29/08 ,  G06F15/173

    Abstract: A method for communication includes receiving at a receiving node over a network from a sending node a succession of data packets belonging to a sequence of transactions, including at least one or more first packets belonging to a first transaction and one or more second packets belonging to a second transaction executed by the sending node after the first transaction, wherein at least one of the second packets is received at the receiving node before at least one of the first packets. At the receiving node, upon receipt of the data packets, data are written from the data packets in the succession to respective locations in a buffer. Execution of the second transaction at the receiving node is delayed until all of the first packets have been received and the first transaction has been executed at the receiving node.

    Efficient delivery of completion notifications
    5.
    发明申请
    Efficient delivery of completion notifications 有权
    有效地交付完成通知

    公开(公告)号：US20140143455A1

    公开(公告)日：2014-05-22

    申请号：US13682773

    申请日：2012-11-21

    Applicant: MELLANOX TECHNOLOGIES LTD.

    Inventor： Ofer Hayut ,  Noam Bloch ,  Michael Kagan ,  Ariel Shachar

    IPC: G06F3/01

    CPC classification number: G06F3/016 ,  G06F13/00 ,  H04L12/00 ,  H04L12/4641

    Abstract: A computer peripheral device includes a host interface, which is configured to communicate over a bus with a host processor and with a system memory of the host processor. Processing circuitry in the peripheral device is configured to receive and execute work items submitted to the peripheral device by client processes running on the host processor, and responsively to completing execution of the work items, to generate completion reports and to write a plurality of the completion reports to the system memory via the bus together in a single bus transaction.

    Abstract translation: 计算机外围设备包括主机接口，其被配置为通过总线与主处理器和主机处理器的系统存储器进行通信。 外围设备中的处理电路被配置为通过在主处理器上运行的客户端进程来接收和执行提交给外围设备的工作项目，并且响应于完成工作项目的执行，生成完成报告并写入多个完成 通过总线在单个总线事务中一起向系统存储器报告。

    Responding to dynamically-connected transport requests
    7.
    发明授权
    Responding to dynamically-connected transport requests 有权
    响应动态连接的传输请求

    公开(公告)号：US09031086B2

    公开(公告)日：2015-05-12

    申请号：US14277793

    申请日：2014-05-15

    Applicant: Mellanox Technologies Ltd.

    Inventor： Ariel Shachar ,  Michael Kagan ,  Noam Bloch

    IPC: H04L12/12 ,  H04L5/00 ,  H04L12/801

    CPC classification number: H04L5/0055 ,  H04L47/10

    Abstract: A method for communication, includes allocating, in a network interface controller (NIC) a single dynamically-connected (DC) initiator context for serving requests from an initiator process running on the initiator host to transmit data to multiple target processes running on one or more target nodes. The NIC transmits a first connect packet directed to a first target process and referencing the DC initiator context so as to open a first dynamic connection with the first target process. The NIC receives over the packet network, in response to the first connect packet, a first acknowledgment packet containing a first session identifier (ID). Following receipt of the first acknowledgment packet, the NIC transmits one or more first data packets containing the first session ID over the first dynamic connection from the NIC to the first target process. Dynamic connections with other target processes may subsequently be handled in similar fashion.

    Abstract translation: 一种用于通信的方法，包括在网络接口控制器（NIC）中分配单个动态连接（DC）发起者上下文，用于从在所述发起者主机上运行的发起者进程提供请求以将数据发送到在一个或多个上运行的多个目标进程 目标节点。 NIC发送指向第一目标进程的第一连接分组并引用DC启动器上下文以便打开与第一目标进程的第一动态连接。 响应于第一连接分组，NIC通过分组网络接收包含第一会话标识符（ID）的第一确认分组。 在接收到第一确认分组之后，NIC通过第一动态连接从NIC传送包含第一会话ID的第一数据分组到第一目标进程。 与其他目标进程的动态连接可以随后以类似的方式来处理。

    OFFLOADING NODE CPU IN DISTRIBUTED REDUNDANT STORAGE SYSTEMS
    8.
    发明申请
    OFFLOADING NODE CPU IN DISTRIBUTED REDUNDANT STORAGE SYSTEMS 有权
    在分布式冗余存储系统中卸载节点CPU

    公开(公告)号：US20140379836A1

    公开(公告)日：2014-12-25

    申请号：US13925868

    申请日：2013-06-25

    Applicant: MELLANOX TECHNOLOGIES LTD.

    Inventor： Omer Zilberboim ,  Ofer Hayut ,  Yaron Haviv ,  Liron Mula ,  Noam Bloch ,  Nir Getter ,  Ariel Shachar

    IPC: G06F3/06

    CPC classification number: G06F11/1076 ,  G06F2211/1028 ,  H04L67/1097

    Abstract: A network interface includes a host interface for communicating with a node, and circuitry which is configured to communicate with one or more other nodes over a communication network so as to carry out, jointly with one or more other nodes, a redundant storage operation that includes a redundancy calculation, including performing the redundancy calculation on behalf of the node.

    Abstract translation: 网络接口包括用于与节点进行通信的主机接口，以及被配置为通过通信网络与一个或多个其他节点进行通信以便与一个或多个其他节点一起执行冗余存储操作的电路，所述冗余存储操作包括 冗余计算，包括代表节点执行冗余计算。

    NIC WITH SWITCHING FUNCTIONALITY BETWEEN NETWORK PORTS
    9.
    发明申请
    NIC WITH SWITCHING FUNCTIONALITY BETWEEN NETWORK PORTS 审中-公开
    网络端口之间切换功能的网卡

    公开(公告)号：US20150271244A1

    公开(公告)日：2015-09-24

    申请号：US14658260

    申请日：2015-03-16

    Applicant: Mellanox Technologies Ltd.

    Inventor： Noam Bloch ,  Ariel Shachar ,  Michael Kagan ,  Lior Narkis ,  Shlomo Raikin

    IPC: H04L29/08 ,  G06F9/455

    CPC classification number: H04L67/02 ,  G06F9/45558 ,  G06F2009/45595 ,  H04L67/2842 ,  H04L69/40

    Abstract: A network interface device includes a host interface for connection to a host processor and a network interface, which is configured to transmit and receive data packets over a network, and which comprises multiple distinct physical ports configured for connection to the network. Processing circuitry is configured to receive, via one of the physical ports, a data packet from the network and to decide, responsively to a destination identifier in the packet, whether to deliver a payload of the data packet to the host processor via the host interface or to forward the data packet to the network via another one of the physical ports.

    Abstract translation: 网络接口设备包括用于连接到主处理器的主机接口和网络接口，网络接口被配置为通过网络发送和接收数据分组，并且包括被配置为连接到网络的多个不同的物理端口。 处理电路被配置为经由物理端口中的一个接收来自网络的数据分组，并且响应于分组中的目的地标识符来决定是否经由主机接口将数据分组的有效载荷传送到主机处理器 或者通过另一个物理端口将数据分组转发到网络。

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