摘要:
Embodiments of the invention are directed to enabling concurrent commands from command requesters in a non-volatile solid-state storage subsystem in a manner that reduces contentions among the commands. Embodiments group blocks of memory into multiple sets of superblocks and associate a command requester to each superblock set. In one embodiment, the superblock sets are dynamically associated with a requester. In one embodiment, the superblock sets are dynamically associated with requesters based in part on at least one of internal memory management needs and host command throughput. In one embodiment, an erase command is executed on a superblock within a set and a simultaneous write command is executed on a superblock within another set.
摘要:
Systems and methods for retaining data in non-volatile solid-state are disclosed in which refresh copy operations are performed on data stored in non-volatile solid-state memory. A controller can comprise a data retention module configured to issue copy commands within different periods of time, and to maintain usage data on a storage subsystem. A refresh copy operation helps ensure that data written to memory retain integrity by causing data to be programmed again onto the memory, which minimizes the risk of data error caused by electron leak in the non-volatile solid-state memory. One or more data structures may be used to determine memory blocks that require refresh copy operations. In one embodiment, a validity bit array is used to track blocks that contain valid data. In another embodiment, a least recently used list is used to track blocks that have been least recently written.
摘要:
A non-volatile storage system is disclosed which provides a mapping table which includes a granularity which does not correspond to the page size of a non-volatile storage array. A reduced mapping table granularity enables more than one mapping entry to exist in a single page on the solid-state array. A write command which does not exceed a mapping table entry can invalidate only a portion of the written page, and can be combined with a second write command to write a new page of the solid-state array.
摘要:
Embodiments of the invention are directed to enable simultaneous or nearly simultaneous execution of internal and host-issued commands in a non-volatile storage subsystem while maintaining data consistency. Embodiments maintain validity information on data residing at physical addresses as well as logical to physical address mappings in the solid-state storage subsystem. In one embodiment, a controller within the storage subsystem selectively cancels internal commands that it determines to be writing data that has been rendered invalid by another command. In one embodiment, the determination is made by consulting the validity information kept by the controller in an invalid page table.
摘要:
Embodiments of this disclosure relate to improving solid-state non-volatile memory management. Embodiments improve the management of solid-state non-volatile memory by providing a central manager responsible for receiving requests from media access requesters. In embodiments, the central manager updates requests with a physical address corresponding to a logical address for a request. In embodiments, the central manager is the only entity updating a mapping table and invalid page table for the system. In embodiments, the central manager may also throttle or prioritize requests originating from two or more requesters to change the ratio of requests executed from each requester.
摘要:
The present disclosure is directed to managing write commands for a storage system implementing address indirection. In some storage systems, a mapping table that provides logical-to-physical mapping may have individual entries that each references a logical address size that exceeds the size of an atomic write to the storage media. In such systems, a write to a logical address is not atomic as it may require several discrete physical writes that may individually fail. The techniques presented employ several pre-commit and post-commit actions to save data that enables the storage system to make writes to these logical addresses atomic and prevent undue delay on powerup.
摘要:
Embodiments of the invention are directed to systems and methods for detecting sequential write threads in non-volatile storage media. The embodiments described herein detect write commands directed to a range of logical addresses corresponding to a write thread. Upon detection of a write command directed to a write thread, the write command is assigned a physical write address associated with the write thread. Identification of write threads can be implemented with a hardware component which performs comparison operations between the write command address range and the write thread address range.
摘要:
Methods and systems for optimizing the selection of memory blocks for garbage collection to maximize the amount of memory freed by garbage collection operations are disclosed. Some of these systems and methods provide for the efficient selection of optimal or near-optimal garbage collection candidate blocks, with the most optimal selection defined as block(s) with the most invalid pages. In some cases, a controller classifies memory blocks into various invalid block pools by the amount of invalid pages each block contains. When garbage collection is performed, the controller selects a block from a non-empty pool of blocks with the highest minimum amount of invalid pages. The pools facilitate the optimal or near-optimal selection of garbage collection candidate blocks in an efficient manner and the data structure of the pools can be implemented with bitmasks, which take minimal space in memory.
摘要:
Embodiments of the invention are directed to a storage subsystem comprising a non-volatile solid-state memory array and a controller. In one embodiment, the controller includes a system operation module configured to manage system memory operations and a queue configured to receive memory commands from a host system and the system operation module. The controller is configured to execute, in the memory array, memory commands from the queue in a sequence that is based at least in part on a throttling ratio provided by the system operation module.
摘要:
Embodiments of the invention are directed to systems and methods for improving wear leveling performance in solid-state memory. The embodiments described herein make more consistent the number of wear leveling operations that need to be performed, so that sudden spikes in the number wear leveling operations may be reduced in solid-state memory. In one embodiment, a rule-based wear leveling approach is used to spread out the execution of wear leveling operations that otherwise would have been triggered in clusters. Under the rule-based approach, wear leveling is periodically triggered by a specified interval of erase counts associated with a unit of solid-state memory such as a group of blocks, rather than by a threshold based on erase counts.