公开(公告)号：US10374118B2

公开(公告)日：2019-08-06

申请号：US15332877

申请日：2016-10-24

Applicant: Massachusetts Institute of Technology

Inventor： Luca Alloatti ,  Rajeev Jagga Ram ,  Dinis Cheian

IPC: H01L27/14 ,  H01L31/18 ,  G02B6/12 ,  G02B6/293 ,  H01L31/0224 ,  H01L31/0232 ,  H01L31/0312 ,  H01L31/0352 ,  H01L31/11 ,  H01L31/103

Abstract: Semiconductor devices, such as photonics devices, employ substantially curved-shaped Silicon-Germanium (SiGe) structures and are fabricated using zero-change CMOS fabrication process technologies. In one example, a closed-loop resonator waveguide-coupled photodetector includes a silicon resonator structure formed in a silicon substrate, interdigitated n-doped well-implant regions and p-doped well-implant regions forming multiple silicon p-n junctions around the silicon resonator structure, and a closed-loop SiGe photocarrier generation region formed in a pocket within the interdigitated n-doped and p-doped well implant regions. The closed-loop SiGe region is located so as to substantially overlap with an optical mode of radiation when present in the silicon resonator structure, and traverses the multiple silicon p-n junctions around the silicon resonator structure. Electric fields arising from the respective p-n silicon junctions significantly facilitate a flow of the generated photocarriers between electric contact regions of the photodetector.

公开(公告)号：US20190311086A1

公开(公告)日：2019-10-10

申请号：US16387729

申请日：2019-04-18

Applicant: Massachusetts Institute of Technology

Inventor： Luca Alloatti

IPC: G06F17/50

Abstract: A photonic design automation (PDA) tool to facilitate design of semiconductor photonic devices is described. In one example, the PDA tool includes a process design library including one or more photonics parameterized cells (pCells), a plurality of processor-executable photonics design functions including a design rule check (DRC) violation removal function, and a semiconductor technology-dependent parameter file including a plurality of design rules that define allowed semiconductor design patterns to be converted to a plurality of semiconductor fabrication mask designs in a first semiconductor technology. The PDA tool supports a graphical user interface (GUI) to provide access to the library of photonic pCells to create intuitive physical property layers for a photonic device, and processes the physical property layers using the DRC violation removal function and the design rules to automatically generate a plurality of mask design layers for a “DRC clean” physical layout of the photonics device.

公开(公告)号：US10978608B2

公开(公告)日：2021-04-13

申请号：US16376086

申请日：2019-04-05

Applicant: Massachusetts Institute of Technology

Inventor： Luca Alloatti ,  Rajeev Jagga Ram ,  Dinis Cheian

IPC: H01L27/14 ,  H01L31/18 ,  H01L31/0232 ,  H01L31/103 ,  G02B6/12 ,  G02B6/293 ,  H01L31/0224 ,  H01L31/0312 ,  H01L31/0352 ,  H01L31/11

Abstract: Semiconductor devices, such as photonics devices, employ substantially curved-shaped Silicon-Germanium (SiGe) structures and are fabricated using zero-change CMOS fabrication process technologies. In one example, a closed-loop resonator waveguide-coupled photodetector includes a silicon resonator structure formed in a silicon substrate, interdigitated n-doped well-implant regions and p-doped well-implant regions forming multiple silicon p-n junctions around the silicon resonator structure, and a closed-loop SiGe photocarrier generation region formed in a pocket within the interdigitated n-doped and p-doped well implant regions. The closed-loop SiGe region is located so as to substantially overlap with an optical mode of radiation when present in the silicon resonator structure, and traverses the multiple silicon p-n junctions around the silicon resonator structure. Electric fields arising from the respective p-n silicon junctions significantly facilitate a flow of the generated photocarriers between electric contact regions of the photodetector.

公开(公告)号：US11105974B2

公开(公告)日：2021-08-31

申请号：US15332872

申请日：2016-10-24

Applicant: Massachusetts Institute of Technology

Inventor： Luca Alloatti ,  Rajeev Jagga Ram

IPC: G02B6/12 ,  H01L31/103 ,  G02B6/122 ,  G02B6/30 ,  G02B6/134 ,  G02B6/13 ,  G02B6/42 ,  H01L31/0232 ,  H01L21/8238 ,  H01L29/49 ,  H01L29/78

Abstract: A waveguide-coupled Silicon Germanium (SiGe) photodetector. A p-n silicon junction is formed in a silicon substrate by an n-doped silicon region and a p-doped silicon region, a polysilicon rib is formed on the silicon substrate to provide a waveguide core for an optical mode of radiation, and an SiGe pocket is formed in the silicon substrate along a length of the polysilicon rib and contiguous with the p-n silicon junction. An optical mode of radiation, when present, substantially overlaps with the SiGe pocket so as to generate photocarriers in the SiGe pocket. An electric field arising from the p-n silicon junction significantly facilitates a flow of the generated photocarriers through the SiGe pocket. In one example, such photodetectors have been fabricated using a standard CMOS semiconductor process technology without requiring changes to the process flow (i.e., “zero-change CMOS”).

公开(公告)号：US20190326468A1

公开(公告)日：2019-10-24

申请号：US16376086

申请日：2019-04-05

Applicant: Massachusetts Institute of Technology

Inventor： Luca Alloatti ,  Rajeev Jaga Ram ,  Dinis Cheian

IPC: H01L31/18 ,  H01L31/103 ,  H01L31/0232 ,  H01L31/0224 ,  G02B6/12 ,  H01L31/11 ,  G02B6/293 ,  H01L31/0312 ,  H01L31/0352

Abstract: Semiconductor devices, such as photonics devices, employ substantially curved-shaped Silicon-Germanium (SiGe) structures and are fabricated using zero-change CMOS fabrication process technologies. In one example, a closed-loop resonator waveguide-coupled photodetector includes a silicon resonator structure formed in a silicon substrate, interdigitated n-doped well-implant regions and p-doped well-implant regions forming multiple silicon p-n junctions around the silicon resonator structure, and a closed-loop SiGe photocarrier generation region formed in a pocket within the interdigitated n-doped and p-doped well implant regions. The closed-loop SiGe region is located so as to substantially overlap with an optical mode of radiation when present in the silicon resonator structure, and traverses the multiple silicon p-n junctions around the silicon resonator structure. Electric fields arising from the respective p-n silicon junctions significantly facilitate a flow of the generated photocarriers between electric contact regions of the photodetector.

公开(公告)号：US10331842B2

公开(公告)日：2019-06-25

申请号：US14972007

申请日：2015-12-16

Applicant: Massachusetts Institute of Technology

Inventor： Luca Alloatti

IPC: G06F17/50

Abstract: A photonic design automation (PDA) tool to facilitate design of semiconductor photonic devices is described. In one example, the PDA tool includes a process design library including one or more photonics parameterized cells (pCells), a plurality of processor-executable photonics design functions including a design rule check (DRC) violation removal function, and a semiconductor technology-dependent parameter file including a plurality of design rules that define allowed semiconductor design patterns to be converted to a plurality of semiconductor fabrication mask designs in a first semiconductor technology. The PDA tool supports a graphical user interface (GUI) to provide access to the library of photonic pCells to create intuitive physical property layers for a photonic device, and processes the physical property layers using the DRC violation removal function and the design rules to automatically generate a plurality of mask design layers for a “DRC clean” physical layout of the photonics device.