公开(公告)号：US07915640B2

公开(公告)日：2011-03-29

申请号：US11419348

申请日：2006-05-19

申请人： Masaya Uemura

发明人： Masaya Uemura

IPC分类号： H01L21/02 ,  H01L31/102 ,  H01L29/66 ,  H01L31/00 ,  H01L21/331 ,  H01L21/8222

CPC分类号： H01L29/7371 ,  H01L29/66318

摘要： A metamorphic buffer layer is formed on a semi-insulating substrate by an epitaxial growth method, a collector layer, a base layer, an emitter layer and an emitter cap layer are sequentially laminated on the metamorphic buffer layer, and a collector electrode is provided in contact with an upper layer of the metamorphic buffer layer. The metamorphic buffer layer is doped with an impurity, in a concentration equivalent to or higher than that in a conventional sub-collector layer, by an impurity doping process during crystal growth so that the metamorphic buffer layer will be able to play the role of guiding the collector current to the collector electrode. Since the sub-collector layer, which is often formed of a ternary mixed crystal or the like having a high thermal resistance, can be omitted, the heat generated in the semiconductor device can be rapidly released into the substrate.

摘要翻译： 通过外延生长法在半绝缘性基板上形成变质缓冲层，在变质缓冲层上依次层叠集电体层，集电极层，基极层，发射极层和发射极覆盖层，并且设置集电极 与变质缓冲层的上层接触。 通过在晶体生长期间的杂质掺杂工艺，在变质缓冲层中掺杂浓度等于或高于常规子集电极层的杂质，使得变质缓冲层将能够起到引导作用 集电极电流到集电极。 由于可以省略通常由具有高耐热性的三元混晶等形成的副集电极层，所以可以将在半导体器件中产生的热迅速地释放到衬底中。

公开(公告)号：US07462892B2

公开(公告)日：2008-12-09

申请号：US11459508

申请日：2006-07-24

申请人： Ichiro Hase ,  Ken Sawada ,  Masaya Uemura

发明人： Ichiro Hase ,  Ken Sawada ,  Masaya Uemura

IPC分类号： H01L27/082

CPC分类号： H01L29/7371 ,  H01L29/0817 ,  H01L29/0821

摘要： A semiconductor device includes an emitter layer: a base layer; and a collector layer, wherein the collector layer and the emitter layer each include a heavily doped thin sublayer having a high impurity concentration, and each of the heavily doped thin sublayers has an impurity concentration higher than those of semiconductor layers adjacent to each heavily doped thin sublayer.

摘要翻译： 半导体器件包括发射极层：基极层; 以及集电极层，其中集电极层和发射极层各自包括具有高杂质浓度的重掺杂薄子层，并且每个重掺杂薄子层具有比与每个重掺杂薄层相邻的半导体层的杂质浓度更高的杂质浓度 子层

公开(公告)号：US20100284207A1

公开(公告)日：2010-11-11

申请号：US12659788

申请日：2010-03-22

申请人： Hiroyuki Watanabe ,  Yasushi Katayama ,  Masaya Uemura

发明人： Hiroyuki Watanabe ,  Yasushi Katayama ,  Masaya Uemura

IPC分类号： H02M7/06

CPC分类号： G01R29/023 ,  H02M3/157

摘要： Disclosed herein is an AC line signal detection device including: a semiconductor integrated circuit; and a conversion section adapted to rectify an AC line signal and convert the rectified signal to an input signal to be fed to the semiconductor integrated circuit, wherein the semiconductor integrated circuit includes a monitoring section adapted to divide the AC line signal into a plurality of voltage ranges with at least one reference voltage proportional to the amplitude of the AC line signal to monitor within which voltage range the AC line signal falls; a measuring section adapted to measure a duration for which the AC line signal remains in each of the voltage ranges; and a determination section adapted to determine, based on the monitoring result of the monitoring section and the measurement result of the measuring section, whether the duration for which the AC line signal remains in each of the voltage ranges exceeds a set time which can be set in advance to make a pass/fail determination on the AC line signal.

摘要翻译： 本发明公开了一种交流线信号检测装置，包括：半导体集成电路; 以及转换部，其适于对AC线信号进行整流，并将整流后的信号转换为输入到半导体集成电路的输入信号，其中，所述半导体集成电路包括适于将所述AC线信号分割为多个电压的监视部 范围具有与AC线信号的幅度成比例的至少一个参考电压，以监视AC线信号在哪个电压范围内下降; 测量部分，适于测量AC线信号保持在每个电压范围内的持续时间; 以及确定部，其适于基于所述监视部的监视结果和所述测量部的测量结果，确定所述AC线信号在每个所述电压范围内保持的持续时间是否超过可设定的设定时间 提前对交流线路信号进行通过/失败判定。

公开(公告)号：US08559203B2

公开(公告)日：2013-10-15

申请号：US12662596

申请日：2010-04-26

申请人： Masaya Uemura ,  Tsutomu Fukuda ,  Yasushi Katayama

发明人： Masaya Uemura ,  Tsutomu Fukuda ,  Yasushi Katayama

IPC分类号： H02M5/42

CPC分类号： H02M3/337 ,  H02M1/4225 ,  H02M2001/007 ,  Y02B70/126

摘要： A power source apparatus includes: a first alternating current line; a second alternating current line; an electric power inputting portion including a rectifying circuit for rectifying an alternating current voltage supplied from an alternating current power source, the electric power inputting portion serving to output the rectified voltage to each of the first and second alternating current lines; a first converter including a switching element for converting the alternating current voltage into a first direct current voltage; a second converter for converting the first direct current voltage obtained in the first converter into a second direct current voltage; and a control circuit for carrying out control for driving at least the switching element of the first converter so as to be turned ON or OFF.

摘要翻译： 电源装置包括：第一交流线; 第二交流线; 电力输入部，包括整流电路，用于对从交流电源供给的交流电压进行整流;电力输入部，用于将整流电压输出到第一和第二交流电线; 第一转换器，包括用于将交流电压转换成第一直流电压的开关元件; 第二转换器，用于将在第一转换器中获得的第一直流电压转换为第二直流电压; 以及控制电路，用于执行用于至少驱动第一转换器的开关元件的控制以被接通或断开。

公开(公告)号：US08384373B2

公开(公告)日：2013-02-26

申请号：US12659788

申请日：2010-03-22

申请人： Hiroyuki Watanabe ,  Yasushi Katayama ,  Masaya Uemura

发明人： Hiroyuki Watanabe ,  Yasushi Katayama ,  Masaya Uemura

IPC分类号： G01R19/00 ,  G01R1/38

CPC分类号： G01R29/023 ,  H02M3/157

摘要： Disclosed herein is an AC line signal detection device including: a semiconductor integrated circuit; and a conversion section adapted to rectify an AC line signal and convert the rectified signal to an input signal to be fed to the semiconductor integrated circuit, wherein the semiconductor integrated circuit includes a monitoring section adapted to divide the AC line signal into a plurality of voltage ranges with at least one reference voltage proportional to the amplitude of the AC line signal to monitor within which voltage range the AC line signal falls; a measuring section adapted to measure a duration for which the AC line signal remains in each of the voltage ranges; and a determination section adapted to determine, based on the monitoring result of the monitoring section and the measurement result of the measuring section, whether the duration for which the AC line signal remains in each of the voltage ranges exceeds a set time which can be set in advance to make a pass/fail determination on the AC line signal.

摘要翻译： 本发明公开了一种交流线信号检测装置，包括：半导体集成电路; 以及转换部，其适于对AC线信号进行整流，并将整流后的信号转换为输入到半导体集成电路的输入信号，其中，所述半导体集成电路包括适于将所述AC线信号分割为多个电压的监视部 范围具有与AC线信号的幅度成比例的至少一个参考电压，以监视AC线信号在哪个电压范围内下降; 测量部分，适于测量AC线信号保持在每个电压范围内的持续时间; 以及确定部，其适于基于所述监视部的监视结果和所述测量部的测量结果来确定所述AC线信号是否保持在每个所述电压范围内的持续时间是否超过可设定的设定时间 提前对交流线路信号进行通过/失败判定。

公开(公告)号：US20100302808A1

公开(公告)日：2010-12-02

申请号：US12662596

申请日：2010-04-26

申请人： Masaya Uemura ,  Tsutomu Fukuda ,  Yasushi Katayama

发明人： Masaya Uemura ,  Tsutomu Fukuda ,  Yasushi Katayama

IPC分类号： H02M3/22

CPC分类号： H02M3/337 ,  H02M1/4225 ,  H02M2001/007 ,  Y02B70/126

摘要： A power source apparatus includes: a first alternating current line; a second alternating current line; an electric power inputting portion including a rectifying circuit for rectifying an alternating current voltage supplied from an alternating current power source, the electric power inputting portion serving to output the rectified voltage to each of the first and second alternating current lines; a first converter including a switching element for converting the alternating current voltage into a first direct current voltage; a second converter for converting the first direct current voltage obtained in the first converter into a second direct current voltage; and a control circuit for carrying out control for driving at least the switching element of the first converter so as to be turned ON or OFF.

摘要翻译： 电源装置包括：第一交流线; 第二交流线; 电力输入部，包括整流电路，用于对从交流电源供给的交流电压进行整流;电力输入部，用于将整流电压输出到第一和第二交流电线; 第一转换器，包括用于将交流电压转换成第一直流电压的开关元件; 第二转换器，用于将在第一转换器中获得的第一直流电压转换为第二直流电压; 以及控制电路，用于执行用于至少驱动第一转换器的开关元件的控制以被接通或断开。

公开(公告)号：US20080203426A1

公开(公告)日：2008-08-28

申请号：US11419348

申请日：2006-05-19

申请人： Masaya Uemura

发明人： Masaya Uemura

IPC分类号： H01L29/737 ,  H01L21/331

CPC分类号： H01L29/7371 ,  H01L29/66318

摘要： A metamorphic buffer layer is formed on a semi-insulating substrate by an epitaxial growth method, a collector layer, a base layer, an emitter layer and an emitter cap layer are sequentially laminated on the metamorphic buffer layer, and a collector electrode is provided in contact with an upper layer of the metamorphic buffer layer. The metamorphic buffer layer is doped with an impurity, in a concentration equivalent to or higher than that in a conventional sub-collector layer, by an impurity doping process during crystal growth so that the metamorphic buffer layer will be able to play the role of guiding the collector current to the collector electrode. Since the sub-collector layer, which is often formed of a ternary mixed crystal or the like having a high thermal resistance, can be omitted, the heat generated in the semiconductor device can be rapidly released into the substrate.

摘要翻译： 通过外延生长法在半绝缘性基板上形成变质缓冲层，在变质缓冲层上依次层叠集电体层，集电极层，基极层，发射极层和发射极覆盖层，并且设置集电极 与变质缓冲层的上层接触。 通过在晶体生长期间的杂质掺杂工艺，在变质缓冲层中掺杂浓度等于或高于常规子集电极层的杂质，使得变质缓冲层将能够起到引导作用 集电极电流到集电极。 由于可以省略通常由具有高耐热性的三元混晶等形成的副集电极层，所以可以将在半导体器件中产生的热迅速地释放到衬底中。

公开(公告)号：US20070023783A1

公开(公告)日：2007-02-01

申请号：US11459508

申请日：2006-07-24

申请人： Ichiro Hase ,  Ken Sawada ,  Masaya Uemura

发明人： Ichiro Hase ,  Ken Sawada ,  Masaya Uemura

IPC分类号： H01L31/00

CPC分类号： H01L29/7371 ,  H01L29/0817 ,  H01L29/0821

摘要： A semiconductor device includes an emitter layer: a base layer; and a collector layer, wherein the collector layer and the emitter layer each include a heavily doped thin sublayer having a high impurity concentration, and each of the heavily doped thin sublayers has an impurity concentration higher than those of semiconductor layers adjacent to each heavily doped thin sublayer.

摘要翻译： 半导体器件包括发射极层：基极层; 以及集电极层，其中集电极层和发射极层各自包括具有高杂质浓度的重掺杂薄子层，并且每个重掺杂薄子层具有比与每个重掺杂薄层相邻的半导体层的杂质浓度更高的杂质浓度 子层