公开(公告)号：US20070182444A1

公开(公告)日：2007-08-09

申请号：US11656447

申请日：2007-01-23

申请人： Masanori Tanaka ,  Morihisa Hirata ,  Hitoshi Okamoto

发明人： Masanori Tanaka ,  Morihisa Hirata ,  Hitoshi Okamoto

IPC分类号： H03K19/003

CPC分类号： H03K19/00315 ,  H01L27/0251 ,  H01L27/0292

摘要： Disclosed is a semiconductor integrated circuit device that includes an output circuit with power thereof supplied from one power supply system, an input circuit with an input terminal thereof connected to an output terminal of the output circuit through a signal line and with power thereof supplied from other power supply system different from the one power supply system, and a circuit that restrains a current flowing from the output circuit into the signal line when an ESD stress is applied from the output circuit to a signal transmitting/receiving portion of the input circuit.

摘要翻译： 公开了一种半导体集成电路器件，其包括具有从一个电源系统提供的功率的输出电路，输入电路，其输入端通过信号线连接到输出电路的输出端，并且从其它电源供电 不同于一个电源系统的电源系统，以及当从输出电路向输入电路的信号发送/接收部分施加ESD应力时，限制从输出电路流入信号线的电流的电路。

公开(公告)号：US08270132B2

公开(公告)日：2012-09-18

申请号：US12929206

申请日：2011-01-07

申请人： Masanori Tanaka ,  Morihisa Hirata ,  Hitoshi Okamoto

发明人： Masanori Tanaka ,  Morihisa Hirata ,  Hitoshi Okamoto

IPC分类号： H02H9/04

CPC分类号： H03K19/00315 ,  H01L27/0251 ,  H01L27/0292

摘要： A protection circuit that includes a first power supply system including a first power supply and a first ground, a second power supply system including a second power supply and a second ground, the second power supply system being connected to the first power supply system via a signal line through which signal transfer is performed between a circuit in the first power supply system and a circuit in the second power supply system, and a control circuit that, when coupled to an electro-static discharge (ESD) stress being applied to the first power supply system controls a switch, the switch being provided between the signal line and the first power supply.

摘要翻译： 一种保护电路，其包括包括第一电源和第一接地的第一电源系统，包括第二电源和第二接地的第二电源系统，所述第二电源系统经由 在第一电源系统中的电路和第二电源系统中的电路之间执行信号传输的信号线，以及当耦合到施加到第一电源系统的静电放电（ESD）应力时的控制电路， 电源系统控制开关，开关设在信号线和第一电源之间。

公开(公告)号：US08749932B2

公开(公告)日：2014-06-10

申请号：US13586214

申请日：2012-08-15

申请人： Masanori Tanaka ,  Morihisa Hirata ,  Hitoshi Okamoto

发明人： Masanori Tanaka ,  Morihisa Hirata ,  Hitoshi Okamoto

IPC分类号： H02H9/00

CPC分类号： H03K19/00315 ,  H01L27/0251 ,  H01L27/0292

摘要： A protection circuit includes a first power supply system including a first power supply and a first ground, a second power supply system including a second power supply and a second ground, and a control circuit that, when coupled to an electro-static discharge (ESD) stress being applied to the first power supply system, controls a first switch. The first switch is provided between the signal line and the first ground. The control circuit includes a capacitance element, a resistance element in series with the capacitance element, and an inverter, an output of the inverter being connected between a gate of the first switch, an input of the inverter being connected to a connecting point between the capacitance element and the resistance element.

摘要翻译： 保护电路包括包括第一电源和第一接地的第一电源系统，包括第二电源和第二接地的第二电源系统以及当耦合到静电放电（ESD）时的控制电路 ）应力施加到第一电源系统，控制第一开关。 第一开关设置在信号线和第一接地之间。 控制电路包括电容元件，与电容元件串联的电阻元件和反相器，反相器的输出端连接在第一开关的栅极之间，反相器的输入端连接到第一开关的连接点 电容元件和电阻元件。

公开(公告)号：US20120307408A1

公开(公告)日：2012-12-06

申请号：US13586214

申请日：2012-08-15

申请人： Masanori TANAKA ,  Morihisa Hirata ,  Hitoshi Okamoto

发明人： Masanori TANAKA ,  Morihisa Hirata ,  Hitoshi Okamoto

IPC分类号： H02H9/04

CPC分类号： H03K19/00315 ,  H01L27/0251 ,  H01L27/0292

摘要： A protection circuit includes a first power supply system including a first power supply and a first ground, a second power supply system including a second power supply and a second ground, and a control circuit that, when coupled to an electro-static discharge (ESD) stress being applied to the first power supply system, controls a first switch. The first switch is provided between the signal line and the first ground. The control circuit includes a capacitance element, a resistance element in series with the capacitance element, and an inverter, an output of the inverter being connected between a gate of the first switch, an input of the inverter being connected to a connecting point between the capacitance element and the resistance element.

摘要翻译： 保护电路包括包括第一电源和第一接地的第一电源系统，包括第二电源和第二接地的第二电源系统以及当耦合到静电放电（ESD）时的控制电路 ）应力施加到第一电源系统，控制第一开关。 第一开关设置在信号线和第一接地之间。 控制电路包括电容元件，与电容元件串联的电阻元件和反相器，反相器的输出连接在第一开关的栅极之间，反相器的输入端连接到第一开关的连接点 电容元件和电阻元件。

公开(公告)号：US20110102962A1

公开(公告)日：2011-05-05

申请号：US12929206

申请日：2011-01-07

申请人： Masanori Tanaka ,  Morihisa Hirata ,  Hitoshi Okamoto

发明人： Masanori Tanaka ,  Morihisa Hirata ,  Hitoshi Okamoto

IPC分类号： H05F3/00

CPC分类号： H03K19/00315 ,  H01L27/0251 ,  H01L27/0292

摘要： A protection circuit that includes a first power supply system including a first power supply and a first ground, a second power supply system including a second power supply and a second ground, the second power supply system being connected to the first power supply system via a signal line through which signal transfer is performed between a circuit in the first power supply system and a circuit in the second power supply system, and a control circuit that, when coupled to an electro-static discharge (ESD) stress being applied to the first power supply system controls a switch, the switch being provided between the signal line and the first power supply.

摘要翻译： 一种保护电路，其包括包括第一电源和第一接地的第一电源系统，包括第二电源和第二接地的第二电源系统，所述第二电源系统经由 在第一电源系统中的电路和第二电源系统中的电路之间执行信号传输的信号线，以及当耦合到施加到第一电源系统的静电放电（ESD）应力时的控制电路， 电源系统控制开关，开关设在信号线和第一电源之间。

公开(公告)号：US07869174B2

公开(公告)日：2011-01-11

申请号：US11656447

申请日：2007-01-23

申请人： Masanori Tanaka ,  Morihisa Hirata ,  Hitoshi Okamoto

发明人： Masanori Tanaka ,  Morihisa Hirata ,  Hitoshi Okamoto

IPC分类号： H02H9/04

CPC分类号： H03K19/00315 ,  H01L27/0251 ,  H01L27/0292

摘要： Disclosed is a semiconductor integrated circuit device that includes an output circuit with power thereof supplied from one power supply system, an input circuit with an input terminal thereof connected to an output terminal of the output circuit through a signal line and with power thereof supplied from other power supply system different from the one power supply system, and a circuit that restrains a current flowing from the output circuit into the signal line when an ESD stress is applied from the output circuit to a signal transmitting/receiving portion of the input circuit.

摘要翻译： 本发明公开了一种半导体集成电路器件，其包括具有从一个电源系统提供的功率的输出电路，其输入电路的输入端通过信号线连接到输出电路的输出端，并且从其它电源供电 不同于一个电源系统的电源系统，以及当从输出电路向输入电路的信号发送/接收部分施加ESD应力时，限制从输出电路流入信号线的电流的电路。

公开(公告)号：US20080185653A1

公开(公告)日：2008-08-07

申请号：US12010991

申请日：2008-01-31

申请人： Hitoshi Okamoto ,  Morihisa Hirata

发明人： Hitoshi Okamoto ,  Morihisa Hirata

IPC分类号： H01L27/088

CPC分类号： H01L27/0266 ,  H01L27/088 ,  H01L2924/0002 ,  H01L2924/00

摘要： To reduce the leak current in the MOSFET connected between the pad and the ground. There are provided a pad PAD for an input or output signal, an n-type MOSFET M1a connected between the pad PAD and the ground and having its gate terminal and backgate connected in common, and a potential control circuit 10 that controls a potential Vb of the gate terminal and the backgate of the n-type MOSFET M1a based on a potential Vin of the pad PAD. The potential control circuit 10 comprises n-type MOSFETs M2 and M3; the n-type MOSFET M1a has its gate terminal and backgate connected to backgates and drains of the n-type MOSFETs M2 and M3; the n-type MOSFET M2 has its source grounded and its gate terminal connected to the pad PAD via a resistance R; and the n-type MOSFET M3 has its source connected to the pad PAD and its gate terminal grounded.

摘要翻译： 以减少连接在焊盘和地之间的MOSFET中的漏电流。 提供用于输入或输出信号的焊盘PAD，连接在焊盘PAD和地之间并且其栅极端子和背板共同连接的n型MOSFET M 1 a和控制电位的电位控制电路10 基于焊盘PAD的电位Vin，栅极端子和n型MOSFET M1a的背栅极的Vb。 电位控制电路10包括n型MOSFET M 2和M 3; n型MOSFET M 1 a的栅极端子和背栅极连接到n型MOSFET M 2和M 3的后栅和漏极; n型MOSFET M 2的源极接地，其栅极端子通过电阻R连接到焊盘PAD; 并且n型MOSFET M 3的源极连接到焊盘PAD并且其栅极端子接地。

公开(公告)号：US08008727B2

公开(公告)日：2011-08-30

申请号：US12010991

申请日：2008-01-31

申请人： Hitoshi Okamoto ,  Morihisa Hirata

发明人： Hitoshi Okamoto ,  Morihisa Hirata

IPC分类号： H01L23/62

CPC分类号： H01L27/0266 ,  H01L27/088 ,  H01L2924/0002 ,  H01L2924/00

摘要： To reduce the leak current in the MOSFET connected between the pad and the ground. There are provided a pad PAD for an input or output signal, an n-type MOSFET M1a connected between the pad PAD and the ground and having its gate terminal and backgate connected in common, and a potential control circuit 10 that controls a potential Vb of the gate terminal and the backgate of the n-type MOSFET M1a based on a potential Vin of the pad PAD. The potential control circuit 10 comprises n-type MOSFETs M2 and M3; the n-type MOSFET M1a has its gate terminal and backgate connected to backgates and drains of the n-type MOSFETs M2 and M3; the n-type MOSFET M2 has its source grounded and its gate terminal connected to the pad PAD via a resistance R; and the n-type MOSFET M3 has its source connected to the pad PAD and its gate terminal grounded.

摘要翻译： 以减少连接在焊盘和地之间的MOSFET中的漏电流。 提供用于输入或输出信号的焊盘PAD，连接在焊盘PAD和地之间并且其栅极端子和背板共同连接的n型MOSFET M1a和控制电位Vb的电位Vb的电位控制电路10 基于焊盘PAD的电位Vin的n型MOSFET M1a的栅极端子和背栅极。 电位控制电路10包括n型MOSFET M2和M3; n型MOSFET M1a的栅极端子和背栅极连接到n型MOSFET M2和M3的后栅和漏极; n型MOSFET M2的源极接地，其栅极端子通过电阻R连接到焊盘PAD; 并且n型MOSFET M3的源极连接到焊盘PAD并且其栅极端子接地。

公开(公告)号：US07631279B2

公开(公告)日：2009-12-08

申请号：US12288084

申请日：2008-10-16

申请人： Morihisa Hirata

发明人： Morihisa Hirata

IPC分类号： G06F17/50

CPC分类号： G06F17/505 ,  G06F2217/78 ,  H01L23/5286 ,  H01L23/60 ,  H01L27/0251 ,  H01L2224/16145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/13091 ,  H01L2924/00014 ,  H01L2924/00

摘要： A semiconductor integrated device includes a plurality of power system circuit units, a first circuit unit to which electric power is supplied from first power supply wiring, and first ground wiring to which the first circuit unit is coupled. Moreover, the semiconductor integrated device includes a second circuit unit to which electric power is supplied from second power supply wiring, and second ground wiring coupled to the second circuit unit. The first circuit unit includes a first interface circuit unit, and the second circuit unit includes a second interface circuit unit configured to perform inputting or outputting of a signal to and from the first interface circuit unit. The first ground wiring is coupled to the second ground wiring through a protection circuit, and the second interface circuit unit is placed in the vicinity of the first interface circuit unit.

摘要翻译： 半导体集成装置包括多个电力系统电路单元，从第一电源布线供给电力的第一电路单元和与第一电路单元耦合的第一接地布线。 此外，半导体集成器件包括从第二电源布线供给电力的第二电路单元和耦合到第二电路单元的第二接地布线。 第一电路单元包括第一接口电路单元，第二电路单元包括被配置为向第一接口电路单元输入信号或从第一接口电路单元输出信号的第二接口电路单元。 第一接地布线通过保护电路耦合到第二接地布线，并且第二接口电路单元被放置在第一接口电路单元附近。

公开(公告)号：US06469354B1

公开(公告)日：2002-10-22

申请号：US09275037

申请日：1999-03-24

申请人： Morihisa Hirata

发明人： Morihisa Hirata

IPC分类号： H01L2362

CPC分类号： H01L27/0288 ,  H01L27/0266 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes a protective circuit at an input/output port thereof, wherein the protective circuit includes a plurality of protective MOS transistors. A diffused region is disposed between the n-type source/drain regions and a guard ring formed in a p-well for encircling the source/drain regions of the protective transistors. The diffused region is of lightly doped p-type or of an n-type and increases the resistance of a parasitic bipolar transistor formed in association with the protective transistors. The increase of the resistance assists protective function of the protective device against an ESD failure of the internal circuit of the semiconductor device.

摘要翻译： 半导体器件在其输入/输出端口处包括保护电路，其中保护电路包括多个保护MOS晶体管。 扩散区域设置在n型源极/漏极区域和形成在p阱中的保护环，用于环绕保护晶体管的源极/漏极区域。 扩散区域是轻掺杂p型或n型，并增加与保护晶体管相关联形成的寄生双极晶体管的电阻。 电阻的增加有助于保护装置的保护功能抵抗半导体器件的内部电路的ESD故障。