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公开(公告)号：US20230037860A1
公开(公告)日：2023-02-09
申请号：US17648440
申请日：2022-01-20
申请人： Marvell Asia Pte Ltd
发明人： Luke Wang , Benjamin Smith , Basel Alnabulsi , Stephane Dallaire , Simon Forey , Karthik Raviprakash , Praveen Prabha , Benjamin T. Reyes
摘要： Equalization circuitry for a data channel in an integrated circuit device includes an analog equalization stage coupled to the data channel, and a digital signal processing stage downstream of the analog equalization stage. The digital signal processing stage generates control signals to control the analog equalization stage, and includes a digital equalization stage that operates on output of the analog equalization stage. The analog equalization stage may further include an enhanced processing stage for optical signals, which may be selectably coupled to the analog equalization stage. The analog equalization stage may include at least one feed-forward or feedback equalization stage, and a decision stage that outputs decision signals at one of a first plurality of signal levels. The enhanced processing stage operates on the decision signals to output enhanced decision signals at one of a second plurality of signal levels of higher resolution than the first plurality of signal levels.
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公开(公告)号：US11876649B2
公开(公告)日：2024-01-16
申请号：US17648440
申请日：2022-01-20
申请人： Marvell Asia Pte Ltd
发明人： Luke Wang , Benjamin Smith , Basel Alnabulsi , Stephane Dallaire , Simon Forey , Karthik Raviprakash , Praveen Prabha , Benjamin T. Reyes
CPC分类号： H04L25/03076 , H04L25/0232 , H04L2025/03433 , H04L2025/03605
摘要： Equalization circuitry for a data channel in an integrated circuit device includes an analog equalization stage coupled to the data channel, and a digital signal processing stage downstream of the analog equalization stage. The digital signal processing stage generates control signals to control the analog equalization stage, and includes a digital equalization stage that operates on output of the analog equalization stage. The analog equalization stage may further include an enhanced processing stage for optical signals, which may be selectably coupled to the analog equalization stage. The analog equalization stage may include at least one feed-forward or feedback equalization stage, and a decision stage that outputs decision signals at one of a first plurality of signal levels. The enhanced processing stage operates on the decision signals to output enhanced decision signals at one of a second plurality of signal levels of higher resolution than the first plurality of signal levels.
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公开(公告)号：US11418163B1
公开(公告)日：2022-08-16
申请号：US16898838
申请日：2020-06-11
发明人： Sagar Ray , Jeffrey Wang , Karthik Raviprakash
摘要： The present invention is directed electrical circuits. According to a specific embodiment, the present invention provides a variable gain amplifier that includes a first switch, which includes drain terminal coupled to an inductor. A second switch is configured in parallel to the inductor, and the resistance value of the second switch is adjustable in response to a control signal. There are other embodiments as well.
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公开(公告)号：US11855598B2
公开(公告)日：2023-12-26
申请号：US17895771
申请日：2022-08-25
CPC分类号： H03G3/3036 , H03G1/0088 , H03G3/001 , H03F3/45183 , H03G2201/502
摘要： A variable gain amplifier includes input terminals configured to receive a differential input of the variable gain amplifier, output terminals configured to generate a differential output of the variable gain amplifier, the differential output having a gain applied by the variable gain amplifier to the differential input, and an impedance ladder circuit coupled to the input terminals, the impedance ladder circuit comprising a plurality of semiconductor switches configured to receive respective control signals based on a control voltage. The plurality of semiconductors switches are responsive to the respective control signals to adjust the gain of the variable gain amplifier and configured with a predetermined exponential scale such that the impedance ladder circuit causes a slope of the gain of the variable gain amplifier relative to the control voltage to be generally linear.
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5.发明授权公开(公告)号：US11750162B1
公开(公告)日：2023-09-05
申请号：US17887806
申请日：2022-08-15
发明人： Sagar Ray , Jeffrey Wang , Karthik Raviprakash
CPC分类号： H03G1/0088 , H03F3/72 , H03G1/0029 , H03G1/0082 , H03F2200/294 , H03G1/0023
摘要： A variable gain amplifier system includes a variable gain amplifier circuit configured to receive an input signal, apply a gain to the input signal, and generate an output signal in accordance with the gain applied to the input signal. The variable gain amplifier circuit is further configured to receive a gain control signal and a bandwidth control signal. A control module is configured to generate the gain control signal to adjust the gain of the variable gain amplifier circuit and generate, separately from the gain control signal, the bandwidth control signal to adjust a bandwidth of the variable gain amplifier circuit by selectively varying an amount of inductance contributed by an inductor circuit of the variable gain amplifier circuit.
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公开(公告)号：US11695383B2
公开(公告)日：2023-07-04
申请号：US17037110
申请日：2020-09-29
发明人： Yida Duan , Karthik Raviprakash , Parmanand Mishra
CPC分类号： H03H7/40 , H03F1/565 , H03H7/383 , H04B1/16 , H04B1/18 , H04L25/0298 , H03H2007/386
摘要： The present invention is directed to communication systems and electrical circuits. According to an embodiment, the present invention provides a termination circuit that includes an inductor network. The inductor network is coupled to a termination resistor and a capacitor network, which includes a first capacitor and a second capacitor. The termination resistor, the first capacitor, and the second capacitor are adjustable, and they affect attenuation of the termination circuit. There are other embodiments as well.
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公开(公告)号：US20220407484A1
公开(公告)日：2022-12-22
申请号：US17895771
申请日：2022-08-25
摘要： A variable gain amplifier includes input terminals configured to receive a differential input of the variable gain amplifier, output terminals configured to generate a differential output of the variable gain amplifier, the differential output having a gain applied by the variable gain amplifier to the differential input, and an impedance ladder circuit coupled to the input terminals, the impedance ladder circuit comprising a plurality of semiconductor switches configured to receive respective control signals based on a control voltage. The plurality of semiconductors switches are responsive to the respective control signals to adjust the gain of the variable gain amplifier and configured with a predetermined exponential scale such that the impedance ladder circuit causes a slope of the gain of the variable gain amplifier relative to the control voltage to be generally linear.
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公开(公告)号：US11463059B1
公开(公告)日：2022-10-04
申请号：US17210080
申请日：2021-03-23
摘要： The present invention is directed to electrical circuits. In a specific embodiment, the present invention provides variable gain amplifier that includes an impedance ladder and a control circuit. The impedance ladder includes n switches configured in parallel. The control circuit includes a digital-to-analog converter and an amplifier. The control circuit generates n control signals for the n switches. There are other embodiments as well.
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