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公开(公告)号：US11876649B2
公开(公告)日：2024-01-16
申请号：US17648440
申请日：2022-01-20
申请人： Marvell Asia Pte Ltd
发明人： Luke Wang , Benjamin Smith , Basel Alnabulsi , Stephane Dallaire , Simon Forey , Karthik Raviprakash , Praveen Prabha , Benjamin T. Reyes
CPC分类号： H04L25/03076 , H04L25/0232 , H04L2025/03433 , H04L2025/03605
摘要： Equalization circuitry for a data channel in an integrated circuit device includes an analog equalization stage coupled to the data channel, and a digital signal processing stage downstream of the analog equalization stage. The digital signal processing stage generates control signals to control the analog equalization stage, and includes a digital equalization stage that operates on output of the analog equalization stage. The analog equalization stage may further include an enhanced processing stage for optical signals, which may be selectably coupled to the analog equalization stage. The analog equalization stage may include at least one feed-forward or feedback equalization stage, and a decision stage that outputs decision signals at one of a first plurality of signal levels. The enhanced processing stage operates on the decision signals to output enhanced decision signals at one of a second plurality of signal levels of higher resolution than the first plurality of signal levels.
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公开(公告)号：US20230037860A1
公开(公告)日：2023-02-09
申请号：US17648440
申请日：2022-01-20
申请人： Marvell Asia Pte Ltd
发明人： Luke Wang , Benjamin Smith , Basel Alnabulsi , Stephane Dallaire , Simon Forey , Karthik Raviprakash , Praveen Prabha , Benjamin T. Reyes
摘要： Equalization circuitry for a data channel in an integrated circuit device includes an analog equalization stage coupled to the data channel, and a digital signal processing stage downstream of the analog equalization stage. The digital signal processing stage generates control signals to control the analog equalization stage, and includes a digital equalization stage that operates on output of the analog equalization stage. The analog equalization stage may further include an enhanced processing stage for optical signals, which may be selectably coupled to the analog equalization stage. The analog equalization stage may include at least one feed-forward or feedback equalization stage, and a decision stage that outputs decision signals at one of a first plurality of signal levels. The enhanced processing stage operates on the decision signals to output enhanced decision signals at one of a second plurality of signal levels of higher resolution than the first plurality of signal levels.
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