公开(公告)号：US08445947B2

公开(公告)日：2013-05-21

申请号：US12497210

申请日：2009-07-02

申请人： Marc Battista ,  Hervé Chalopin ,  Hervé Barthelemy

发明人： Marc Battista ,  Hervé Chalopin ,  Hervé Barthelemy

IPC分类号： H01L21/28

CPC分类号： H01L27/0811 ,  H01L27/0727 ,  H01L29/783 ,  H01L29/861 ,  H02M3/07

摘要： An integrated circuit including a semiconductor layer; and a MOS transistor including first and second power terminals and a bulk insulated from the semiconductor layer, the first power terminal being intended to receive an oscillating signal, the transistor gate and the bulk being connected to the first power terminal.

摘要翻译： 一种包括半导体层的集成电路; 以及MOS晶体管，包括第一和第二电源端子以及与半导体层绝缘的体积，第一电源端子旨在接收振荡信号，晶体管栅极和体积连接到第一电力端子。

公开(公告)号：US20100034000A1

公开(公告)日：2010-02-11

申请号：US12497210

申请日：2009-07-02

申请人： Marc Battista ,  Hervé Chalopin ,  Hérve Barthelemy

发明人： Marc Battista ,  Hervé Chalopin ,  Hérve Barthelemy

IPC分类号： H02M7/217

CPC分类号： H01L27/0811 ,  H01L27/0727 ,  H01L29/783 ,  H01L29/861 ,  H02M3/07

摘要： An integrated circuit including a semiconductor layer; and a MOS transistor including first and second power terminals and a bulk insulated from the semiconductor layer, the first power terminal being intended to receive an oscillating signal, the transistor gate and the bulk being connected to the first power terminal.

摘要翻译： 一种包括半导体层的集成电路; 以及MOS晶体管，包括第一和第二电源端子以及与半导体层绝缘的体积，第一电源端子旨在接收振荡信号，晶体管栅极和体积连接到第一电力端子。

公开(公告)号：US07209988B2

公开(公告)日：2007-04-24

申请号：US11127793

申请日：2005-05-12

申请人： Hervé Chalopin ,  Laurent Tabaries

发明人： Hervé Chalopin ,  Laurent Tabaries

IPC分类号： G06F13/42 ,  G06F9/00 ,  G06F9/46 ,  H04L29/06 ,  H04J3/08 ,  G06F15/163 ,  H04L12/40

CPC分类号： G06F13/4239

摘要： An electronic system comprises an initiator module and a target module addressable by the initiator module. The initiator module is activated by edges of an activation signal generated from a first clock signal having a frequency. A control module is activated by edges of a second clock signal having a frequency, which is at least twice as large as the frequency of the first clock signal. The control module is constructed so as, in response to an request for access to the target module, initiated by the initiator module on an active edge of the activation signal, to set a signal for blocking the activation signal before the next edge of the latter, and to reinitialize the blocking signal on the first active edge of the first clock signal which follows the indication by the target module that the processing of the request is terminated at the target module.

摘要翻译： 电子系统包括发起者模块和可由发起者模块寻址的目标模块。 启动器模块由从具有频率的第一时钟信号产生的激活信号的边缘激活。 控制模块由具有至少是第一时钟信号的频率的两倍的频率的第二时钟信号的边缘激活。 控制模块被构造成响应于由启动器模块在激活信号的有效边缘上启动的对目标模块的访问请求，以在后者的下一个边缘之前设置用于阻止激活信号的信号 并且重新初始化第一时钟信号的第一有效边沿上的阻塞信号，该阻塞信号跟随目标模块指示该请求的处理在目标模块处终止。

公开(公告)号：US08576904B2

公开(公告)日：2013-11-05

申请号：US12165868

申请日：2008-07-01

申请人： Hervé Chalopin ,  Anne Collard-Bovy ,  Philippe Courmontagne

发明人： Hervé Chalopin ,  Anne Collard-Bovy ,  Philippe Courmontagne

IPC分类号： H03K7/08

CPC分类号： H04L25/4902 ,  H04B1/71637 ,  H04B2001/6908

摘要： The pulse train of a signal is modulated by a DPIM modulation involving a discrete random time parameter. A first processing is performed on the signal to deliver a sampled signal. A second processing is performed on the sampled signal, comprising a correlation processing including at least one elementary correlation processing with a correlation mask corresponding to the shape of at least part of a sampled pulse, and delivering second information items. A third processing is performed for detecting the pulses following a first pulse by taking account of the position of the first pulse, on packets of second information items, which are separated by a duration related to the discrete random parameter.

摘要翻译： 信号的脉冲串由涉及离散随机时间参数的DPIM调制进行调制。 对信号执行第一处理以传送采样信号。 对采样信号执行第二处理，其包括相关处理，该相关处理包括至少一个基本相关处理和对应于采样脉冲的至少一部分的形状的相关掩码，以及传送第二信息项。 执行第三处理，用于通过考虑第一脉冲的位置来检测与第一脉冲之后的脉冲相关的第二信息项的分组，该分组被分离与离散随机参数相关的持续时间。

公开(公告)号：US08396172B2

公开(公告)日：2013-03-12

申请号：US12165739

申请日：2008-07-01

申请人： Hervé Chalopin ,  Anne Collard-Bovy ,  Philippe Courmontagne

发明人： Hervé Chalopin ,  Anne Collard-Bovy ,  Philippe Courmontagne

IPC分类号： H04L27/06

CPC分类号： H04B1/7172 ,  H04B1/71637 ,  H04B2001/6908

摘要： The waveform of the signal varies according to the distance at which the signal was emitted, and several correlation signals are defined and correspond respectively to at least part of several sampled waveforms of the signal respectively emitted at several distances of different values so that the sum of the maxima of intercorrelations performed respectively between the various correlation signals and the various sampled waveforms is substantially constant over an interval including all the values of the distances. The correlation processing includes several elementary correlation processings respectively performed with the correlation signals and each delivering initial correlation values, as well as a summation of the homologous initial correlation values respectively delivered by the elementary correlation processings so as to obtain the correlation values.

摘要翻译： 信号的波形根据发射信号的距离而变化，并且定义了几个相关信号，并分别对应于以不同值的几个距离发射的信号的几个采样波形的至少一部分，使得 分别在各种相关信号和各种采样波形之间执行的相互关系的最大值在包括距离的所有值的间隔上基本上是恒定的。 相关处理包括分别用相关信号和每个传送初始相关值执行的几个基本相关处理，以及通过基本相关处理分别传送的同源初始相关值的和，以获得相关值。

公开(公告)号：US20120030753A1

公开(公告)日：2012-02-02

申请号：US13189808

申请日：2011-07-25

申请人： Gilles Bas ,  Hervé Chalopin ,  François Tailliet

发明人： Gilles Bas ,  Hervé Chalopin ,  François Tailliet

IPC分类号： G06F21/00

CPC分类号： G06F21/85

摘要： A method for authenticating a transmission between a first and a second circuit transiting through at least one third circuit, wherein: data are transmitted from the first to the third circuit, and from the third to the second circuit; a first signature of the data is calculated by the first circuit; at least a second signature of the data is calculated by the third circuit; at least one first portion of the first signature is transmitted by the first circuit to the third one; and the second signature is transmitted by the third circuit to the second one, a portion of this signature being distorted in case of a failure of authentication of the first portion of the first signature by the third circuit.

摘要翻译： 一种用于认证通过至少一个第三电路的第一和第二电路之间的传输的方法，其中：数据从第一电路发送到第三电路，从第三电路传输到第二电路; 数据的第一个签名由第一个电路计算; 数据的至少第二签名由第三电路计算; 所述第一签名的至少一个第一部分由所述第一电路传输到所述第一签名; 并且第二签名由第三电路发送到第二签名，在第三电路对第一签名的第一部分的认证失败的情况下，该签名的一部分被失真。

公开(公告)号：US20120030388A1

公开(公告)日：2012-02-02

申请号：US13189830

申请日：2011-07-25

申请人： Gilles Bas ,  Hervé Chalopin ,  François Tailliet

发明人： Gilles Bas ,  Hervé Chalopin ,  François Tailliet

IPC分类号： G06F13/42 ,  G06F13/00

CPC分类号： G06F13/4027 ,  G06F13/4295

摘要： A method of conversion by at least one interface circuit connected between a first bus including at least one data wire and one clock wire, and at least one second single-wire bus, of a transmission between a master circuit connected to the first bus and at least one slave circuit connected to the second bus, wherein a speculative read command is sent to the slave circuit before interpreting the state of a bit for controlling a reading or a writing, originating from the master circuit.

摘要翻译： 一种通过至少一个接口电路进行转换的方法，该至少一个接口电路连接在包括至少一条数据线和一条时钟线的第一总线和至少一条第二单线总线之间，该总线与连接到第一总线的主电路和 连接到第二总线的至少一个从电路，其中在解释用于控制来自主电路的读取或写入的位的状态之前，向从电路发送推测读命令。

公开(公告)号：US08671278B2

公开(公告)日：2014-03-11

申请号：US13189808

申请日：2011-07-25

申请人： Gilles Bas ,  Hervé Chalopin ,  François Tailliet

发明人： Gilles Bas ,  Hervé Chalopin ,  François Tailliet

IPC分类号： H04L9/00 ,  G06F13/00

CPC分类号： G06F21/85

摘要： A method for authenticating a transmission between a first and a second circuit transiting through at least one third circuit, wherein: data are transmitted from the first to the third circuit, and from the third to the second circuit; a first signature of the data is calculated by the first circuit; at least a second signature of the data is calculated by the third circuit; at least one first portion of the first signature is transmitted by the first circuit to the third one; and the second signature is transmitted by the third circuit to the second one, a portion of this signature being distorted in case of a failure of authentication of the first portion of the first signature by the third circuit.

摘要翻译： 一种用于认证通过至少一个第三电路的第一和第二电路之间的传输的方法，其中：数据从第一电路发送到第三电路，从第三电路传输到第二电路; 数据的第一个签名由第一个电路计算; 数据的至少第二签名由第三电路计算; 所述第一签名的至少一个第一部分由所述第一电路传输到所述第一签名; 并且第二签名由第三电路发送到第二签名，在第三电路对第一签名的第一部分的认证失败的情况下，该签名的一部分被失真。

公开(公告)号：US07313646B2

公开(公告)日：2007-12-25

申请号：US11138885

申请日：2005-05-26

申请人： Hervé Chalopin ,  Laurent Tabaries

发明人： Hervé Chalopin ,  Laurent Tabaries

IPC分类号： G06F12/00 ,  G06F9/30 ,  G06F15/00 ,  G06F15/76

CPC分类号： G06F13/385

摘要： An electronic system comprises an initiator module and a target module addressable by the initiator module, and an interface and control module for interfacing between respective communication protocols of the initiator module and of the target module. The interface and control module is constructed to set a composite instruction detection signal in response to the detection of a composite instruction executed by the initiator module, which composite instruction detection signal is used for the interfacing. The interface and control module is constructed to detect a composite instruction executed by the initiator module when, at a determined clock cycle of the initiator module, a change of the elementary operation executed by the initiator module is detected with respect to the previous clock cycle of the initiator module, while, at the same time, a signal for selecting the target module which was active is kept active.

摘要翻译： 电子系统包括发起者模块和可由发起者模块寻址的目标模块，以及用于在发起者模块和目标模块的相应通信协议之间进行接口的接口和控制模块。 接口和控制模块被构造成响应于由发起者模块执行的复合指令的检测来设置复合指令检测信号，该组合指令检测信号用于接口。 所述接口和控制模块被构造为检测由所述发起者模块执行的复合指令，所述复合指令在所述发起者模块的所确定的时钟周期，相对于所述发起者模块的先前时钟周期检测到所述发起者模块执行的基本操作的改变， 同时，启动模块同时保持活动的选择目标模块的信号。

公开(公告)号：US09639500B2

公开(公告)日：2017-05-02

申请号：US13189781

申请日：2011-07-25

申请人： Gilles Bas ,  Hervé Chalopin ,  François Tailliet

发明人： Gilles Bas ,  Hervé Chalopin ,  François Tailliet

IPC分类号： H04B14/04 ,  G06F13/42

CPC分类号： G06F13/4282 ,  G06F1/3212 ,  G06F1/3287 ,  G06F13/364 ,  G06F13/4295

摘要： A method for transmitting data over a single-wire bus wherein a first communication channel is defined by pulses of different durations according to the state of the transmitted bit and depending on a reference duration, and a second communication channel is defined by the reference duration.