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    COMPARATOR AND ANALOG-TO-DIGITAL CONVERTER USING THE SAME
    1.
    发明申请
    COMPARATOR AND ANALOG-TO-DIGITAL CONVERTER USING THE SAME 失效
    使用相同的比较器和模拟数字转换器

    公开(公告)号：US20090045995A1

    公开(公告)日：2009-02-19

    申请号：US12175209

    申请日：2008-07-17

    申请人： Mai NOZAWA ,  Daisuke Kurose ,  Takeshi Ueno ,  Tetsuro Itakura

    发明人： Mai NOZAWA ,  Daisuke Kurose ,  Takeshi Ueno ,  Tetsuro Itakura

    IPC分类号： H03M1/34

    CPC分类号： H03K5/2481 ,  H03K5/249

    摘要： A comparator includes a first inverter which is inserted between a power source terminal and one end of a first variable resistor, includes a first FinFET provided with a first gate terminal for receiving a positive phase output signal, and a second gate terminal for receiving a clock signal changing between a first level and a second level, inverts the positive phase output signal, and outputs a negative phase output signal, and a second inverter which is inserted between the power source terminal and one end of a second variable resistor, includes a second FinFET provided with a third gate terminal for receiving the negative phase output signal, a fourth gate terminal for receiving the clock signal, and the same polarity as the first FinFET, inverts the negative phase output signal, and outputs the positive phase output signal.

    摘要翻译： 比较器包括插入在电源端子和第一可变电阻器的一端之间的第一反相器，包括：第一FinFET，其具有用于接收正相输出信号的第一栅极端子和用于接收时钟的第二栅极端子 信号在第一电平和第二电平之间变化，使正相输出信号反相，并输出负相输出信号，并且插入在电源端和第二可变电阻的一端之间的第二反相器包括第二 FinFET具有用于接收负相输出信号的第三栅极端子，用于接收时钟信号的第四栅极端子和与第一FinFET相同的极性，反相负相输出信号，并输出正相输出信号。

    DEM SYSTEM, DELTA-SIGMA A/D CONVERTER, AND RECEIVER
    2.
    发明申请
    DEM SYSTEM, DELTA-SIGMA A/D CONVERTER, AND RECEIVER 审中-公开
    DEM系统，DELTA-SIGMA A / D转换器和接收器

    公开(公告)号：US20090296858A1

    公开(公告)日：2009-12-03

    申请号：US12205384

    申请日：2008-09-05

    申请人： Mai NOZAWA ,  Takeshi UENO ,  Masanori FURUTA

    发明人： Mai NOZAWA ,  Takeshi UENO ,  Masanori FURUTA

    IPC分类号： H04L27/22 ,  H03M1/12 ,  H03M7/00

    CPC分类号： H04L25/49 ,  H03M1/0665 ,  H03M1/747 ,  H03M3/464 ,  H03M7/165

    摘要： A DEM (dynamic element matching) system in which a digital signal is inputted, has a switching circuit which, being equipped with a plurality of switches, each of the plurality of switches is subjected to on/off control based on a switch control signal, receives a first thermometer code in which the total number of logic ones and logic zeros corresponding to the digital signal is “n” and outputs a second thermometer code in which the total number of logic ones and logic zeros is “n” (where “n” is an integer equal to or larger than 2), a latch circuit which latches the second thermometer code output from the switching circuit and outputs the second thermometer code, and a switch control signal generating circuit which generates the switch control signal using the digital signal or the second thermometer code output from the latch circuit and outputs the switch control signal.

    摘要翻译： 其中输入数字信号的DEM（动态元件匹配）系统具有开关电路，该切换电路配备有多个开关，基于开关控制信号对多个开关中的每一个进行接通/断开控制， 接收第一温度计代码，其中对应于数字信号的逻辑1和逻辑零的总数为“n”，并输出第二温度计代码，其中逻辑1和逻辑零的总数为“n”（其中“n” “是等于或大于2的整数的整数），锁存电路，其锁存从开关电路输出的第二温度计代码并输出第二温度计代码;以及开关控制信号发生电路，其使用数字信号产生开关控制信号 或从锁存电路输出的第二温度计代码，并输出开关控制信号。