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公开(公告)号:US10298944B2
公开(公告)日:2019-05-21
申请号:US15841624
申请日:2017-12-14
Applicant: MStar Semiconductor, Inc.
Inventor: Kuan-Chou Lee , Kai-Wen Cheng , Tai-Lai Tung
Abstract: A decoding circuit applied to a multimedia apparatus is provided. The decoding circuit is for decoding encoded data to generate system information, and includes multiple processing circuits and a determination circuit. The multiple processing circuits individually process the encoded data to generate multiple processed signals, and respectively correspond to multiple bit combinations of a part of the system information. The determination circuit determines the system information according to the multiple processed signals.
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2.
公开(公告)号:US10026409B2
公开(公告)日:2018-07-17
申请号:US15405643
申请日:2017-01-13
Applicant: MStar Semiconductor, Inc.
Inventor: Yu-Che Su , Kuan-Chou Lee , Tai-Lai Tung
Abstract: A stereo-phonic frequency modulation receiver includes: a frequency modulation demodulation circuit, receiving a reception signal, and generating a demodulated signal according to the reception signal; a frequency-division demultiplexer, generating a sum signal, a difference signal and a pilot amplitude signal according to the demodulated signal; a dual sound channel separation circuit, generating a left-channel output signal and a right-channel output signal according to the sum signal and a weakened difference signal; and a weakening circuit, weakening the difference signal according to the pilot amplitude signal or a signal-to-noise ratio (SNR) to generate the weakened difference signal.
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公开(公告)号:US20180076991A1
公开(公告)日:2018-03-15
申请号:US15451568
申请日:2017-03-07
Applicant: MStar Semiconductor, Inc.
Inventor: Kuan-Chou Lee , Tai-Lai Tung
IPC: H04L27/233 , H04L27/34
CPC classification number: H04L27/2334 , H04L27/0014 , H04L27/34 , H04L2027/003 , H04L2027/0051
Abstract: An apparatus for estimating carrier frequency offset includes a notch frequency setting circuit, N notch filters, an Mth power circuit, a spectrum generating circuit, a peak frequency determining circuit, a comparing circuit, and a frequency offset determining circuit. The notch frequency setting circuit sets different notch-frequencies for the notch filters, which generate N filtered signals by filtering an input signal. The Mth power circuit performs an Mth power calculation on the N filtered signals to generate N Mth power filtered signals. The spectrum generating circuit generates N Mth order spectra for the N Mth power filtered signals. The peak frequency determining circuit determines respective peak frequencies of the N Mth order spectra. The comparing circuit identifies an optimal peak frequency from the N peak frequencies. The frequency offset determining circuit determines an estimated carrier frequency offset according to the optimal peak frequency.
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公开(公告)号:US10050821B2
公开(公告)日:2018-08-14
申请号:US14987915
申请日:2016-01-05
Applicant: MStar Semiconductor, Inc.
Inventor: Yu-Che Su , Yi-Ying Liao , Kuan-Chou Lee , Tai-Lai Tung
Abstract: A receiving circuit capable of estimating frequency offset includes a front circuit and a calculation circuit. The front circuit receives a remote signal to generate a received signal. The calculation circuit includes: an exponentiation module, calculating an exponent of a power to generate a high-order signal; a frequency-domain transform module, performing frequency-domain transform on the high-order signal to generate a spectrum; a peak searching module, searching for a peak of the amplitude of the spectrum to generate a peak coordinate value reflecting a frequency where the peak occurs; an offset estimating module, adding the peak coordinate value with a compensation value to generate a sum, dividing the sum by a first divisor to generate a remainder, subtracting the compensation value from the remainder to generate a difference, and dividing the difference by a second divisor to generate an offset estimation value reflecting the frequency offset.
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公开(公告)号:US09967086B2
公开(公告)日:2018-05-08
申请号:US15397861
申请日:2017-01-04
Applicant: MStar Semiconductor, Inc.
Inventor: Yu-Che Su , Kuan-Chou Lee , Tai-Lai Tung
IPC: H04L7/033 , H04L27/227 , H04L27/00 , H04L27/14 , H03L7/093
CPC classification number: H04L7/0331 , H03D3/04 , H03D3/06 , H03L7/093 , H04L27/14 , H04L27/227 , H04L2027/0067
Abstract: A frequency modulation receiver includes a frequency modulation demodulation circuit that generates a first signal, and a phase locked loop (PLL) circuit coupled to the frequency modulation demodulation circuit to receive the first signal. The PLL circuit includes: a voltage-controlled oscillator (VCO), generating an oscillation output signal according to a filtered output signal; a phase detector, coupled to the VCO, generating a phase signal according to the oscillation output signal and the first signal; and a proportional-integral-derivative (PID) filter, coupled to the VCO and the phase detector, receiving the phase signal and generating the filtered output signal to the VCO.
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公开(公告)号:US09948491B2
公开(公告)日:2018-04-17
申请号:US15408622
申请日:2017-01-18
Applicant: MStar Semiconductor, Inc.
Inventor: Kuan-Chou Lee , Tai-Lai Tung
CPC classification number: H04L27/3854 , H04L27/18
Abstract: An apparatus for estimating carrier frequency offset includes an Mth-power circuit, a spectrum generating circuit, a spectrum adjusting circuit, a peak frequency determining circuit and a frequency offset determining circuit. The Mth-power circuit performs an Mth-power calculation on an input signal to generate an Mth-power calculation result. The spectrum generating circuit generates a spectrum according to the Mth-power calculation result. The spectrum adjusting circuit identifies a partial energy peak value in a partial frequency range from the spectrum, and increases the partial energy peak value to be higher than any other energy in the spectrum to generate an adjusted spectrum. The peak frequency determining circuit identifies a peak frequency having a maximum energy peak value from the adjusted spectrum. The frequency offset determining circuit determines an estimated carrier frequency offset result according to the peak frequency.
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公开(公告)号:US09967121B2
公开(公告)日:2018-05-08
申请号:US15451568
申请日:2017-03-07
Applicant: MStar Semiconductor, Inc.
Inventor: Kuan-Chou Lee , Tai-Lai Tung
IPC: H04L27/233 , H04L27/34 , H04L27/00
CPC classification number: H04L27/2334 , H04L27/0014 , H04L27/34 , H04L2027/003 , H04L2027/0051
Abstract: An apparatus for estimating carrier frequency offset includes a notch frequency setting circuit, N notch filters, an Mth power circuit, a spectrum generating circuit, a peak frequency determining circuit, a comparing circuit, and a frequency offset determining circuit. The notch frequency setting circuit sets different notch-frequencies for the notch filters, which generate N filtered signals by filtering an input signal. The Mth power circuit performs an Mth power calculation on the N filtered signals to generate N Mth power filtered signals. The spectrum generating circuit generates N Mth order spectra for the N Mth power filtered signals. The peak frequency determining circuit determines respective peak frequencies of the N Mth order spectra. The comparing circuit identifies an optimal peak frequency from the N peak frequencies. The frequency offset determining circuit determines an estimated carrier frequency offset according to the optimal peak frequency.
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公开(公告)号:US09923586B2
公开(公告)日:2018-03-20
申请号:US15401310
申请日:2017-01-09
Applicant: MStar Semiconductor, Inc.
Inventor: Kuan-Chou Lee , Yu-Che Su , Tai-Lai Tung
CPC classification number: H04B1/1081 , H04L27/0014 , H04L27/2657 , H04L27/2672
Abstract: An apparatus for estimating carrier frequency offset for multipath signals includes an echo signal filtering circuit, an Mth power circuit, a spectrum generating circuit, a peak frequency determining circuit and a frequency offset determining circuit. The echo signal filtering circuit filters out an echo signal from an input signal to generate a filtered signal. The Mth power circuit performs an Mth power calculation on the filtered signal to generate an Mth power calculation result. The spectrum generating circuit generates an Mth power spectrum according to the Mth power calculation result. The peak frequency determining circuit determines a peak frequency corresponding to an amplitude peak from the Mth power spectrum. The frequency offset determining circuit determines an estimated carrier frequency offset according to the peak frequency.
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公开(公告)号:US20180054344A1
公开(公告)日:2018-02-22
申请号:US15408622
申请日:2017-01-18
Applicant: MStar Semiconductor, Inc.
Inventor: Kuan-Chou Lee , Tai-Lai Tung
CPC classification number: H04L27/3854 , H04L27/18
Abstract: An apparatus for estimating carrier frequency offset includes an Mth-power circuit, a spectrum generating circuit, a spectrum adjusting circuit, a peak frequency determining circuit and a frequency offset determining circuit. The Mth-power circuit performs an Mth-power calculation on an input signal to generate an Mth-power calculation result. The spectrum generating circuit generates a spectrum according to the Mth-power calculation result. The spectrum adjusting circuit identifies a partial energy peak value in a partial frequency range from the spectrum, and increases the partial energy peak value to be higher than any other energy in the spectrum to generate an adjusted spectrum. The peak frequency determining circuit identifies a peak frequency having a maximum energy peak value from the adjusted spectrum. The frequency offset determining circuit determines an estimated carrier frequency offset result according to the peak frequency.
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10.
公开(公告)号:US20180018976A1
公开(公告)日:2018-01-18
申请号:US15405643
申请日:2017-01-13
Applicant: MStar Semiconductor, Inc.
Inventor: Yu-Che Su , Kuan-Chou Lee , Tai-Lai Tung
IPC: G10L19/008 , H04S1/00 , G10L19/26
CPC classification number: G10L19/008 , G10L19/265 , H04B1/1669 , H04B1/1676 , H04H20/47 , H04H20/48 , H04S1/007
Abstract: A stereo-phonic frequency modulation receiver includes: a frequency modulation demodulation circuit, receiving a reception signal, and generating a demodulated signal according to the reception signal; a frequency-division demultiplexer, generating a sum signal, a difference signal and a pilot amplitude signal according to the demodulated signal; a dual sound channel separation circuit, generating a left-channel output signal and a right-channel output signal according to the sum signal and a weakened difference signal; and a weakening circuit, weakening the difference signal according to the pilot amplitude signal or a signal-to-noise ratio (SNR) to generate the weakened difference signal.
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