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23 条记录 (耗时 0.016 秒)

    SERVICING MEMORY HIGH PRIORITY READ REQUESTS
    1.
    发明申请
    SERVICING MEMORY HIGH PRIORITY READ REQUESTS 有权

    公开(公告)号：US20220066939A1

    公开(公告)日：2022-03-03

    申请号：US17005079

    申请日：2020-08-27

    申请人： Micron Technology, Inc.

    发明人： Ryan G. Fisher

    IPC分类号： G06F12/0882 ,  G06F12/0891 ,  G06F12/02 ,  G06F9/30 ,  G06F9/48

    摘要： Various embodiments described herein provide for a memory device that can service a high priority read request during data input without losing the data inputted to the memory device prior to the high priority read request, without re-requesting data from a host, and while leaving one or more internal resources of a memory sub-system available for use by an error correction function of the memory sub-system.

    Methods of operating memory devices within a communication protocol standard timeout requirement
    2.
    发明授权
    Methods of operating memory devices within a communication protocol standard timeout requirement 有权
    在通信协议标准超时要求内操作存储设备的方法

    公开(公告)号：US09423960B2

    公开(公告)日：2016-08-23

    申请号：US13943494

    申请日：2013-07-16

    申请人： Micron Technology, Inc.

    发明人： Ryan G. Fisher

    IPC分类号： G06F3/06 ,  G06F12/02

    CPC分类号： G06F3/0604 ,  G06F3/0659 ,  G06F3/0688 ,  G06F12/02

    摘要： The present disclosure includes methods and devices for logical memory blocks. One method for operating a memory device includes receiving a command to operate X pages of the memory device, X being greater than Y, and executing the command by executing multiple subcommands, each subcommand operating on a logical memory block portion of the X pages, each logical memory block including at most Y pages. T is a timeout limit, N is a number of pages comprising a block of memory, and Y is number of pages that can be operated within time T.

    摘要翻译： 本公开包括用于逻辑存储器块的方法和设备。 一种用于操作存储器件的方法包括接收操作存储器件X页的命令，X大于Y，并通过执行多个子命令来执行命令，每个子命令在X页的逻辑存储器块部分上操作，每个子命令 最多包含Y页的逻辑存储块。 T是超时限制，N是包括存储器块的页数，Y是可以在时间T内操作的页数。

    APPARATUSES AND METHODS OF ENTERING UNSELECTED MEMORIES INTO A DIFFERENT POWER MODE DURING MULTI-MEMORY OPERATION
    3.
    发明申请
    APPARATUSES AND METHODS OF ENTERING UNSELECTED MEMORIES INTO A DIFFERENT POWER MODE DURING MULTI-MEMORY OPERATION 有权
    在多个存储器操作期间将未被选择的记忆输入不同功率模式的设备和方法

    公开(公告)号：US20150378427A1

    公开(公告)日：2015-12-31

    申请号：US14319302

    申请日：2014-06-30

    申请人： Micron Technology, Inc.

    发明人： Terry M. Grunzke ,  Ryan G. Fisher

    IPC分类号： G06F1/32

    CPC分类号： G06F1/3275 ,  G06F1/3203 ,  Y02D10/14

    摘要： Disclosed are examples of apparatuses including memory devices and systems comprising memories sharing a common enable signal, wherein the memories may be put into different power modes. Example methods for setting the different power modes of the memories are disclosed. In some examples, different power modes may be set by issuing memory group-level commands, memory-level commands, or combinations thereof.

    摘要翻译： 公开了包括存储器装置和包括共享共同使能信号的存储器的系统的设备的示例，其中存储器可以被置于不同的功率模式中。 公开了用于设置存储器的不同功率模式的示例方法。 在一些示例中，可以通过发出存储器组级命令，存储器级命令或其组合来设置不同的功率模式。

    MULTI-PLANE SWITCHING OF NON-VOLATILE MEMORY
    4.
    发明申请
    MULTI-PLANE SWITCHING OF NON-VOLATILE MEMORY 有权

    公开(公告)号：US20230063564A1

    公开(公告)日：2023-03-02

    申请号：US17464427

    申请日：2021-09-01

    申请人： Micron Technology, Inc.

    发明人： Ryan G. Fisher ,  Cory M. Steinmetz

    IPC分类号： G06F12/0806 ,  G06F12/02

    摘要： A method includes transferring data out of a first buffer coupled to a first plane of a plurality of planes of a memory component, where the data was previously transferred from the first plane to the first buffer responsive to an access request to sense data stored in the plurality of planes of the memory component. The method further includes transferring, subsequent to transferring the data out of the first buffer and independently of a command from a processing device, data out of a second buffer coupled to a second plane of the plurality of planes of the memory component, where the data transferred out of the second buffer was previously transferred from the second plane to the second buffer responsive to the access request.

    MANAGING DATA INTEGRITY USING A CHANGE IN A NUMBER OF DATA ERRORS AND AN AMOUNT OF TIME IN WHICH THE CHANGE OCCURRED
    8.
    发明公开
    MANAGING DATA INTEGRITY USING A CHANGE IN A NUMBER OF DATA ERRORS AND AN AMOUNT OF TIME IN WHICH THE CHANGE OCCURRED 审中-公开

    公开(公告)号：US20240345919A1

    公开(公告)日：2024-10-17

    申请号：US18755592

    申请日：2024-06-26

    申请人： Micron Technology, Inc.

    发明人： Ryan G. Fisher

    IPC分类号： G06F11/10 ,  G06F11/07

    CPC分类号： G06F11/1048 ,  G06F11/0757 ,  G06F11/0793

    摘要： Exemplary methods, apparatuses, and systems include performing an initial data integrity scan of a subset of memory at an initial time to determine an initial error rate for the subset of memory. The initial error rate and the initial time are stored. A subsequent integrity scan of the subset of memory is performed at a second time to determine a subsequent error rate for the subset of memory. A difference between the initial error rate and the subsequent error rate is determined. A difference between the initial time and the subsequent time is determined. A remedial action is selected using the difference between the initial error rate and the subsequent error rate and the difference between the initial time and the subsequent time and the remedial action is performed.