-
公开(公告)号:US20210335617A1
公开(公告)日:2021-10-28
申请号:US17312594
申请日:2019-12-13
Applicant: Lam Research Corporation
Inventor: Ruopeng Deng , Xiaolan Ba , Tianhua Yu , Yu Pan , Juwen Gao
IPC: H01L21/285 , H01L21/768
Abstract: Methods and apparatuses are described that provide tungsten deposition with low roughness. In some embodiments, the methods involve co-flowing nitrogen with hydrogen during an atomic layer deposition process of depositing tungsten that uses hydrogen as a reducing agent. In some embodiments, the methods involve depositing a cap layer, such as tungsten oxide or amorphous tungsten layer, on a sidewall surface of a 3D NAND structure. The disclosed embodiments have a wide variety of applications including depositing tungsten into 3D NAND structures.
-
公开(公告)号:US20240266177A1
公开(公告)日:2024-08-08
申请号:US18612005
申请日:2024-03-21
Applicant: Lam Research Corporation
Inventor: Ruopeng Deng , Xiaolan Ba , Tianhua Yu , Yu Pan , Juwen Gao
IPC: H01L21/285 , H01L21/768 , H10B41/27 , H10B43/27
CPC classification number: H01L21/28562 , H01L21/28568 , H01L21/76876 , H01L21/76877 , H10B41/27 , H10B43/27
Abstract: Methods and apparatuses are described that provide tungsten deposition with low roughness. In some embodiments, the methods involve co-flowing nitrogen with hydrogen during an atomic layer deposition process of depositing tungsten that uses hydrogen as a reducing agent. In some embodiments, the methods involve depositing a cap layer, such as tungsten oxide or amorphous tungsten layer, on a sidewall surface of a 3D NAND structure. The disclosed embodiments have a wide variety of applications including depositing tungsten into 3D NAND structures.
-
公开(公告)号:US20230290639A1
公开(公告)日:2023-09-14
申请号:US18003137
申请日:2020-07-29
Applicant: Lam Research Corporation
Inventor: Lawrence Schloss , Anand Chandrashekar , Juwen Gao , Stephanie Noelle Sandra Sawant-Goubert , Yu Pan
IPC: H01L21/28 , C23C16/34 , C23C16/14 , C23C16/56 , C23C16/458 , C23C16/455 , C23C16/04
CPC classification number: H01L21/28088 , H01L29/4011 , C23C16/34 , C23C16/14 , C23C16/56 , C23C16/4583 , C23C16/45565 , C23C16/45527 , C23C16/045
Abstract: Methods and apparatuses for forming low resistivity tungsten using tungsten nitride barrier layers are provided herein. Methods involve depositing extremely thin tungsten nitride barrier layers prior to depositing tungsten nucleation and bulk tungsten layers. Methods are applicable for fabricating tungsten word lines in 3D NAND fabrication as well as for fabricating tungsten-containing components of DRAM and logic fabrication. Apparatus included processing stations with multiple charge volumes to pressurize gases in close vicinity to a showerhead of a processing chamber for processing semiconductor substrates.
-
公开(公告)号:US11972952B2
公开(公告)日:2024-04-30
申请号:US17312594
申请日:2019-12-13
Applicant: Lam Research Corporation
Inventor: Ruopeng Deng , Xiaolan Ba , Tianhua Yu , Yu Pan , Juwen Gao
IPC: H01L21/76 , H01L21/285 , H01L21/768 , H10B41/27 , H10B43/27
CPC classification number: H01L21/28562 , H01L21/28568 , H01L21/76876 , H01L21/76877 , H10B41/27 , H10B43/27
Abstract: Methods and apparatuses are described that provide tungsten deposition with low roughness. In some embodiments, the methods involve co-flowing nitrogen with hydrogen during an atomic layer deposition process of depositing tungsten that uses hydrogen as a reducing agent. In some embodiments, the methods involve depositing a cap layer, such as tungsten oxide or amorphous tungsten layer, on a sidewall surface of a 3D NAND structure. The disclosed embodiments have a wide variety of applications including depositing tungsten into 3D NAND structures.
-
公开(公告)号:US20230010049A1
公开(公告)日:2023-01-12
申请号:US17757553
申请日:2020-12-17
Applicant: Lam Research Corporation
Inventor: Ravi Vellanki , Eric H. Lenz , Yu Pan
IPC: H01L21/683 , H01L21/687 , C23C16/06 , C23C16/458 , C23C16/455 , B23C3/28
Abstract: Chucks for supporting semiconductor wafers during certain processing operations are disclosed. The chucks may include a recessed region near the outer perimeter of the wafer that has one or more surfaces that face towards the wafer but are recessed therefrom so as to not contact the wafer around the perimeter of the wafer. The use of such a recessed region prevents direct thermally conductive contact between the chuck and the wafer, thereby allowing the wafer to achieve a more uniform temperature distribution in certain process conditions. This has the further effect of causing certain processing operations to be more uniform with respect to edge-center deposition (or etch) layer thickness.
-
-
-
-