知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

31 records (took 0.031 seconds)

    High data rate integrated circuit with transmitter configuration
    1.
    发明授权
    High data rate integrated circuit with transmitter configuration 有权

    公开(公告)号：US12196704B2

    公开(公告)日：2025-01-14

    申请号：US18056194

    申请日：2022-11-16

    Applicant: LIFE TECHNOLOGIES CORPORATION

    Inventor： Keith G. Fife ,  Jungwook Yang

    IPC: G01N27/414 ,  G06F30/392 ,  G06F30/394

    Abstract: A high data rate integrated circuit, such as an integrated circuit including a large sensor array, may be implemented using clock multipliers in individual power domains, coupled to sets of transmitters, including a transmitter pair configuration. Reference clock distribution circuitry on the integrated circuit distributes a relatively low speed reference clock. In a transmitter pair configuration, each pair comprises a first transmitter and a second transmitter in a transmitter power domain. Also, each pair of transmitters includes a clock multiplier connected to the reference clock distribution circuitry, and disposed between the first and second transmitters, which produces a local transmit clock.

    Chemical device with thin conductive element
    3.
    发明授权
    Chemical device with thin conductive element 有权

    公开(公告)号：US10481124B2

    公开(公告)日：2019-11-19

    申请号：US15818718

    申请日：2017-11-20

    Applicant: LIFE TECHNOLOGIES CORPORATION

    Inventor： Keith G. Fife ,  Jordan Owens ,  Shifeng Li ,  James Bustillo

    IPC: G01N27/414 ,  B01L3/00

    Abstract: In one implementation, a chemical device is described. The sensor includes a chemically-sensitive field effect transistor including a floating gate structure having a plurality of floating gate conductors electrically coupled to one another. A conductive element overlies and is in communication with an uppermost floating gate conductor in the plurality of floating gate conductors. The conductive element is wider and thinner than the uppermost floating gate conductor. A dielectric material defines an opening extending to an upper surface of the conductive element.

    Method and system for delta double sampling
    6.
    发明授权
    Method and system for delta double sampling 有权
    三角采样方法和系统

    公开(公告)号：US08912005B1

    公开(公告)日：2014-12-16

    申请号：US14334291

    申请日：2014-07-17

    Applicant: Life Technologies Corporation

    Inventor： Keith G. Fife ,  Jungwook Yang

    IPC: G01N15/06 ,  H03K5/003

    CPC classification number: G01N27/4148 ,  H03K5/003 ,  Y10S436/806 ,  Y10S436/807 ,  Y10T436/11

    Abstract: An array of sensors arranged in matched pairs of transistors with an output formed on a first transistor and a sensor formed on the second transistor of the matched pair. The matched pairs are arranged such that the second transistor in the matched pair is read through the output of the first transistor in the matched pair. The first transistor in the matched pair is forced into the saturation (active) region to prevent interference from the second transistor on the output of the first transistor. A sample is taken of the output. The first transistor is then placed into the linear region allowing the sensor formed on the second transistor to be read through the output of the first transistor. A sample is taken from the output of the sensor reading of the second transistor. A difference is formed of the two samples.

    Abstract translation: 布置成匹配的晶体管对的传感器阵列，其具有形成在第一晶体管上的输出和形成在匹配对的第二晶体管上的传感器。 匹配对被布置成使得匹配对中的第二晶体管通过匹配对中的第一晶体管的输出读取。 匹配对中的第一晶体管被迫进入饱和（有源）区域，以防止第一晶体管的输出上的第二晶体管的干扰。 取出输出的样本。 然后将第一晶体管放置在线性区域中，允许通过第一晶体管的输出读取形成在第二晶体管上的传感器。 样品从第二晶体管的传感器读数的输出中取出。 两个样本形成差异。

    METHODS FOR MANUFACTURING CHEMICAL SENSORS WITH EXTENDED SENSOR SURFACES
    7.
    发明申请
    METHODS FOR MANUFACTURING CHEMICAL SENSORS WITH EXTENDED SENSOR SURFACES 审中-公开
    用于制造具有扩展传感器表面的化学传感器的方法

    公开(公告)号：US20140273324A1

    公开(公告)日：2014-09-18

    申请号：US13801186

    申请日：2013-03-13

    Applicant: LIFE TECHNOLOGIES CORPORATION

    Inventor： Keith G. Fife ,  James Bustillo ,  Jordan Owens

    IPC: G01N27/414 ,  H01L29/66

    CPC classification number: G01N27/4145

    Abstract: In one implementation, a method for manufacturing a chemical sensor is described. The method includes forming a chemically-sensitive field effect transistor including a floating gate conductor having an upper surface. A dielectric material is formed defining an opening extending to the upper surface of the floating gate conductor. A conductive material is formed within the opening and on an upper surface of the dielectric material. A fill material is formed on the conductive material. The fill material is used as a protect mask to remove the conductive material on the upper surface of the dielectric material. The fill material is then removed to expose remaining conductive material on a sidewall of the opening.

    Abstract translation: 在一个实施方式中，描述了用于制造化学传感器的方法。 该方法包括形成包括具有上表面的浮栅导体的化学敏感场效应晶体管。 形成介电材料，限定了延伸到浮动栅极导体的上表面的开口。 导电材料形成在电介质材料的开口内和上表面上。 在导电材料上形成填充材料。 填充材料用作保护掩模以去除介电材料的上表面上的导电材料。 然后去除填充材料以在开口的侧壁上露出剩余的导电材料。

    HIGH DATA RATE INTEGRATED CIRCUIT WITH TRANSMITTER CONFIGURATION
    8.
    发明公开
    HIGH DATA RATE INTEGRATED CIRCUIT WITH TRANSMITTER CONFIGURATION 审中-公开

    公开(公告)号：US20230204537A1

    公开(公告)日：2023-06-29

    申请号：US18056194

    申请日：2022-11-16

    Applicant: LIFE TECHNOLOGIES CORPORATION

    Inventor： Keith G. Fife ,  Jungwook Yang

    IPC: G01N27/414 ,  G06F30/392 ,  G06F30/394

    CPC classification number: G01N27/4145 ,  G06F30/392 ,  G06F30/394 ,  G01N27/4148

    Abstract: A high data rate integrated circuit, such as an integrated circuit including a large sensor array, may be implemented using clock multipliers in individual power domains, coupled to sets of transmitters, including a transmitter pair configuration. Reference clock distribution circuitry on the integrated circuit distributes a relatively low speed reference clock. In a transmitter pair configuration, each pair comprises a first transmitter and a second transmitter in a transmitter power domain. Also, each pair of transmitters includes a clock multiplier connected to the reference clock distribution circuitry, and disposed between the first and second transmitters, which produces a local transmit clock.

Patent Agency Ranking