公开(公告)号：US20220132653A1

公开(公告)日：2022-04-28

申请号：US17310657

申请日：2020-02-13

申请人： LG INNOTEK CO., LTD.

发明人： Byeong Kyun CHOI ,  Min Young HWANG ,  Hyun Gu IM

IPC分类号： H05K1/02 ,  H05K1/03

摘要： A circuit board, according to an embodiment, comprises: a first insulating layer; a second insulating layer disposed on one surface of the first insulating layer; and a third insulating layer disposed on the other surface of the first insulating layer. A circuit pattern is disposed on at least one insulating layer from among the first to third insulating layers, at least one insulating layer from among the first to third insulating layers comprises glass fiber, at least one insulating layer from among the first to third insulating layers does not comprise glass fiber, and the thicknesses of the first to third insulating layers are different from each other.

公开(公告)号：US20150311290A1

公开(公告)日：2015-10-29

申请号：US14648704

申请日：2013-11-21

申请人： LG INNOTEK CO., LTD

发明人： Seok Min KANG ,  Ji Hye KIM ,  Min Young HWANG

IPC分类号： H01L29/16 ,  H01L33/00 ,  H01L29/36 ,  H01L33/26 ,  H01L33/34 ,  H01L33/22 ,  H01L29/24 ,  H01L29/872 ,  H01L29/34

CPC分类号： H01L29/1608 ,  H01L21/02378 ,  H01L21/02521 ,  H01L21/02529 ,  H01L29/0878 ,  H01L29/24 ,  H01L29/34 ,  H01L29/36 ,  H01L29/7802 ,  H01L29/872 ,  H01L33/0033 ,  H01L33/025 ,  H01L33/22 ,  H01L33/26 ,  H01L33/34

摘要： An epitaxial wafer comprises an epitaxial layer disposed on a substrate. The epitaxial layer comprises first to third semiconductor layers. The third semiconductor layer has a thickness that is thicker than that of the first semiconductor layer. A second doping density of the second semiconductor layer is between a first doping density of the first semiconductor layer and a third doping density of the third semiconductor layer.

摘要翻译： 外延晶片包括设置在基板上的外延层。 外延层包括第一至第三半导体层。 第三半导体层的厚度比第一半导体层厚。 第二半导体层的第二掺杂密度在第一半导体层的第一掺杂密度和第三半导体层的第三掺杂密度之间。

公开(公告)号：US20240298410A1

公开(公告)日：2024-09-05

申请号：US18663472

申请日：2024-05-14

申请人： LG INNOTEK CO., LTD.

发明人： Min Young HWANG ,  Byeong Kyun Choi ,  Jin Seok Lee ,  Moo Seong Kim

IPC分类号： H05K3/10 ,  H05K1/09

CPC分类号： H05K3/10 ,  H05K1/09 ,  H05K2201/0355 ,  H05K2201/0358 ,  H05K2201/0959 ,  H05K2203/0723

摘要： A circuit board according to an embodiment includes an insulating layer; and a circuit pattern disposed on the insulating layer, wherein the circuit pattern includes a copper foil layer disposed on the insulating layer, a first plating layer disposed on the copper foil layer, and a second plating layer disposed on the first plating layer, and wherein the copper foil layer has a thickness in a range of 2 μm to 5 μm.

公开(公告)号：US20240043654A1

公开(公告)日：2024-02-08

申请号：US18021632

申请日：2021-08-17

申请人： LG INNOTEK CO., LTD.

发明人： Byeong Kyun CHOI ,  Min Young HWANG ,  Moo Seong KIM ,  Jin Seok LEE

IPC分类号： C08K3/22 ,  C08K3/34 ,  H05K1/03 ,  H01L23/498

CPC分类号： C08K3/22 ,  C08K3/34 ,  H05K1/036 ,  H05K1/0373 ,  H01L23/49894 ,  H01L23/49822 ,  C08K2003/2244 ,  C08K2003/2241 ,  H05K2201/0242 ,  H05K2201/0209 ,  H05K2201/0269

摘要： A resin composition for a semiconductor package according to an embodiment includes a resin composition that is a composite of a resin and a filler disposed in the resin, wherein the filler includes at least one concave portion provided on a surface, wherein a content of the filler has a range of 10 vol. % to 40 vol % of a total volume of the resin composition, and wherein a porosity corresponds to a volume occupied by the concave portion in a total volume of the filler and has a range of 20% to 35%.

公开(公告)号：US20230066269A1

公开(公告)日：2023-03-02

申请号：US17792768

申请日：2021-01-13

申请人： LG INNOTEK CO., LTD.

发明人： Min Young HWANG ,  Hyun Gu IM ,  Byeong Kyun CHOI

IPC分类号： H05K1/02

摘要： A circuit board according to an embodiment includes an insulating layer; and a via portion disposed in a via hole formed in the insulating layer; wherein the via portion includes: a first pad disposed on a lower surface of the insulating layer; a second pad disposed on an upper surface of the insulating layer; a third pad disposed in the via hole and disposed on the first pad; and a connection portion disposed in the via hole and disposed between the second pad and the third pad.

公开(公告)号：US20220151068A1

公开(公告)日：2022-05-12

申请号：US17430708

申请日：2020-02-10

申请人： LG INNOTEK CO., LTD.

发明人： Min Young HWANG ,  Moo Seong KIM ,  Byeong Kyun CHOI

IPC分类号： H05K1/11 ,  H05K1/02

摘要： A circuit board according to one embodiment comprises a first insulation layer, a circuit pattern on the first insulation layer, and a second insulation layer on the circuit pattern, wherein a heat transfer member is arranged inside the first insulation layer and/or the second insulation layer, and the heat transfer member is arranged while coming in contact with a side surface of the insulation layer.

公开(公告)号：US20220071016A1

公开(公告)日：2022-03-03

申请号：US17462157

申请日：2021-08-31

申请人： LG INNOTEK CO., LTD.

发明人： Min Young HWANG ,  Byeong Kyun Choi ,  Jin Seok Lee ,  Moo Seong Kim

IPC分类号： H05K3/10 ,  H05K1/09

摘要： A circuit board according to an embodiment includes an insulating layer; and a circuit pattern disposed on the insulating layer, wherein the circuit pattern includes a copper foil layer disposed on the insulating layer, a first plating layer disposed on the copper foil layer, and a second plating layer disposed on the first plating layer, and wherein the copper foil layer has a thickness in a range of 2 μm to 5 μm.