公开(公告)号：US11239379B2

公开(公告)日：2022-02-01

申请号：US16456915

申请日：2019-06-28

Applicant: LG ELECTRONICS INC.

Inventor： Jungmin Ha ,  Sungjin Kim ,  Juhwa Cheong ,  Junyong Ahn ,  Hyungwook Choi ,  Wonjae Chang ,  Jaesung Kim

IPC: H01L31/0224 ,  H01L31/0216 ,  H01L31/0747 ,  H01L31/02 ,  H01L31/0368 ,  H01L31/077 ,  H01L31/18

Abstract: A solar cell can include a silicon substrate; a tunnel layer disposed on a first surface of the silicon substrate, the tunnel layer including a dielectric material; a polycrystalline silicon layer disposed on the tunnel layer; a dielectric layer disposed on the polycrystalline silicon layer; and an electrode penetrating through the dielectric layer and directly contacting with the polycrystalline silicon layer, wherein the polycrystalline silicon layer includes a metal crystal region positioned at a region where the polycrystalline silicon layer contacts the electrode, and wherein the metal crystal region includes a plurality of metal crystals, the plurality of metal crystals including a metal material same as a metal material included in the electrode.

公开(公告)号：US10050170B2

公开(公告)日：2018-08-14

申请号：US15418336

申请日：2017-01-27

Applicant: LG ELECTRONICS INC.

Inventor： Juhwa Cheong ,  Junyong Ahn ,  Wonjae Chang ,  Jaesung Kim

IPC: H01L31/18 ,  H01L31/20 ,  H01L31/0236 ,  H01L31/0216 ,  H01L31/0745 ,  H01L31/105 ,  H01L31/024 ,  H01L31/068 ,  H01L31/0224

CPC classification number: H01L31/1864 ,  H01L31/0216 ,  H01L31/02167 ,  H01L31/02168 ,  H01L31/022441 ,  H01L31/0236 ,  H01L31/024 ,  H01L31/068 ,  H01L31/0745 ,  H01L31/105 ,  H01L31/1804 ,  H01L31/182 ,  H01L31/186 ,  H01L31/202 ,  H01L31/208 ,  Y02E10/546 ,  Y02E10/547 ,  Y02P70/521

Abstract: A method of manufacturing a solar cell can include forming a silicon oxide film on a semiconductor substrate and successively exposing the silicon oxide film to a temperature in a range of 570° C. to 700° C. to anneal the silicon oxide film.

公开(公告)号：US20180097140A1

公开(公告)日：2018-04-05

申请号：US15832321

申请日：2017-12-05

Applicant: LG ELECTRONICS INC.

Inventor： Juhwa Cheong ,  Junyong Ahn ,  Wonjae Chang ,  Jaesung Kim

IPC: H01L31/18 ,  H01L31/0368 ,  H01L31/068

CPC classification number: H01L31/1804 ,  H01L31/0216 ,  H01L31/02167 ,  H01L31/02168 ,  H01L31/022441 ,  H01L31/0236 ,  H01L31/024 ,  H01L31/03682 ,  H01L31/068 ,  H01L31/0745 ,  H01L31/105 ,  H01L31/182 ,  H01L31/186 ,  H01L31/1864 ,  H01L31/202 ,  H01L31/208 ,  Y02E10/546 ,  Y02E10/547 ,  Y02P70/521

Abstract: A method of manufacturing a solar cell can include forming a silicon oxide film on a semiconductor substrate and successively exposing the silicon oxide film to a temperature in a range of 570° C. to 700° C. to anneal the silicon oxide film.

公开(公告)号：US11133426B2

公开(公告)日：2021-09-28

申请号：US16457129

申请日：2019-06-28

Applicant: LG ELECTRONICS INC.

Inventor： Jungmin Ha ,  Sungjin Kim ,  Juhwa Cheong ,  Junyong Ahn ,  Hyungwook Choi ,  Wonjae Chang ,  Jaesung Kim

IPC: H01L31/0224 ,  H01L31/0216 ,  H01L31/0747 ,  H01L31/02 ,  H01L31/0368 ,  H01L31/077 ,  H01L31/18

Abstract: A method for manufacturing a solar cell can include forming a tunneling layer on first and second surfaces of a semiconductor substrate, the tunneling layer including a dielectric material; forming a polycrystalline silicon layer on the tunnel layer at the first surface and on the second surface of the semiconductor substrate; removing portions of the tunnel layer and the polycrystalline silicon layer formed at the first surface of the semiconductor substrate; forming a doping region at the first surface of the semiconductor substrate by diffusing a dopant; forming a passivation layer on the polycrystalline silicon layer at the second surface of the semiconductor substrate; and forming a second electrode connected to the polycrystalline silicon layer by penetrating through the passivation layer.

公开(公告)号：US10230009B2

公开(公告)日：2019-03-12

申请号：US15995701

申请日：2018-06-01

Applicant: LG ELECTRONICS INC.

Inventor： Jungmin Ha ,  Sungjin Kim ,  Juhwa Cheong ,  Junyong Ahn ,  Hyungwook Choi ,  Wonjae Chang ,  Jaesung Kim

IPC: H01L31/0216 ,  H01L31/0224 ,  H01L31/0747 ,  H01L31/02 ,  H01L31/0368 ,  H01L31/077 ,  H01L31/18

Abstract: A solar cell can include a silicon semiconductor substrate having a first conductive type; a oxide layer on a first surface of the silicon semiconductor substrate; a polysilicon layer on the oxide layer and having the first conductive type; an emitter region at a second surface of the silicon semiconductor substrate opposite to the first surface and having a second conductive type opposite to the first conductive type; a first passivation film on the polysilicon layer; a first electrode connected to the polysilicon layer through an opening formed in the first passivation film; a second passivation film on the emitter region; and a second electrode connected to the emitter region through an opening formed in the second passivation film.

公开(公告)号：US10367115B2

公开(公告)日：2019-07-30

申请号：US15832321

申请日：2017-12-05

Applicant: LG ELECTRONICS INC.

Inventor： Juhwa Cheong ,  Junyong Ahn ,  Wonjae Chang ,  Jaesung Kim

IPC: H01L31/18 ,  H01L31/068 ,  H01L31/0368 ,  H01L31/0216 ,  H01L31/0236 ,  H01L31/024 ,  H01L31/0745 ,  H01L31/105 ,  H01L31/20 ,  H01L31/0224

Abstract: A method of manufacturing a solar cell can include forming a silicon oxide film on a semiconductor substrate and successively exposing the silicon oxide film to a temperature in a range of 570° C. to 700° C. to anneal the silicon oxide film.

公开(公告)号：US10014419B2

公开(公告)日：2018-07-03

申请号：US15643180

申请日：2017-07-06

Applicant: LG ELECTRONICS INC.

Inventor： Jungmin Ha ,  Sungjin Kim ,  Juhwa Cheong ,  Junyong Ahn ,  Hyungwook Choi ,  Wonjae Chang ,  Jaesung Kim

IPC: H01L31/18 ,  H01L31/0216 ,  H01L31/0224 ,  H01L31/0747 ,  H01L31/02 ,  H01L31/0368 ,  H01L31/077

CPC classification number: H01L31/022433 ,  H01L31/0201 ,  H01L31/02167 ,  H01L31/02168 ,  H01L31/022425 ,  H01L31/03685 ,  H01L31/0747 ,  H01L31/077 ,  H01L31/1824 ,  H01L31/1864 ,  H01L31/1868 ,  Y02E10/50

Abstract: A method for manufacturing a solar cell can include a tunnel layer forming step of forming a tunnel layer on a first surface of a semiconductor substrate, a first conductive type semiconductor region forming step of forming a first conductive type semiconductor region on the first surface of the semiconductor substrate, a second conductive type semiconductor region forming step of forming a second conductive type semiconductor region by doping impurities of a second conductive type into a second surface of the semiconductor substrate, a first passivation film forming step of forming a first passivation film on the first conductive type semiconductor region and an electrode forming step of forming a first electrode connected to the first conductive type semiconductor region and a second electrode connected to the second conductive type semiconductor region.

公开(公告)号：US09722104B2

公开(公告)日：2017-08-01

申请号：US14953264

申请日：2015-11-27

Applicant: LG ELECTRONICS INC.

Inventor： Jungmin Ha ,  Sungjin Kim ,  Juhwa Cheong ,  Junyong Ahn ,  Hyungwook Choi ,  Wonjae Chang ,  Jaesung Kim

IPC: H01L31/0216 ,  H01L31/0224 ,  H01L31/0747 ,  H01L31/02 ,  H01L31/0368 ,  H01L31/077 ,  H01L31/18

CPC classification number: H01L31/022433 ,  H01L31/0201 ,  H01L31/02167 ,  H01L31/02168 ,  H01L31/022425 ,  H01L31/03685 ,  H01L31/0747 ,  H01L31/077 ,  H01L31/1824 ,  H01L31/1864 ,  H01L31/1868 ,  Y02E10/50

Abstract: Disclosed are a solar cell and a method for manufacturing the same. A solar cell includes a semiconductor substrate, a tunnel layer on the first surface of the semiconductor substrate, a first conductive type semiconductor region on the tunnel layer and includes impurities of a first conductive type, a second conductive type semiconductor region on a second surface and includes impurities of a second conductive type opposite the first conductive type, a first passivation film on the first conductive type semiconductor region, a first electrode formed on the first passivation film and connected to the first conductive type semiconductor region through an opening portion formed in the first passivation film, a second passivation film on the second conductive type semiconductor region, and a second electrode formed on the second passivation film and connected to the second conductive type semiconductor region through an opening portion formed in the second passivation film.