公开(公告)号：US20230411513A1

公开(公告)日：2023-12-21

申请号：US18231377

申请日：2023-08-08

Applicant: LAPIS SEMICONDUCTOR CO., LTD.

Inventor： TOMOMI YAMANOBE ,  YOSHINOBU TAKESHITA ,  KAZUTAKA KODAMA ,  MINAKO ORITU

IPC: H01L29/78 ,  H01L29/40 ,  H01L21/266 ,  H01L29/417 ,  H01L29/66

CPC classification number: H01L29/7813 ,  H01L29/407 ,  H01L29/7804 ,  H01L29/41741 ,  H01L29/66712 ,  H01L21/266

Abstract: A semiconductor device including: a first semiconductor layer having a first conductive type; a second semiconductor layer provided on the first semiconductor layer, the second semiconductor layer having a second conductive type that is a conductive type different from the first conductive type; an impurity region of the first conductive type formed at a surface of the second semiconductor layer; first electrodes contacting the impurity region, the second semiconductor layer, and the first semiconductor layer via a first insulating film; and second electrodes contacting the first electrodes via a second insulating film, and contacting the first semiconductor layer via a third insulating film, the second electrodes including PN junctions at borders between upper portions that contact the first semiconductor layer via the third insulating film and lower portions that contact the first semiconductor layer via the third insulating film.

公开(公告)号：US20190259873A1

公开(公告)日：2019-08-22

申请号：US16280250

申请日：2019-02-20

Applicant: LAPIS SEMICONDUCTOR CO., LTD.

Inventor： TOMOMI YAMANOBE ,  YOSHINOBU TAKESHITA ,  KAZUTAKA KODAMA ,  MINAKO ORITU

IPC: H01L29/78 ,  H01L29/40 ,  H01L29/417 ,  H01L29/66 ,  H01L21/266

Abstract: A semiconductor device including: a first semiconductor layer having a first conductive type; a second semiconductor layer provided on the first semiconductor layer, the second semiconductor layer having a second conductive type that is a conductive type different from the first conductive type; an impurity region of the first conductive type formed at a surface of the second semiconductor layer; first electrodes contacting the impurity region, the second semiconductor layer, and the first semiconductor layer via a first insulating film; and second electrodes contacting the first electrodes via a second insulating film, and contacting the first semiconductor layer via a third insulating film, the second electrodes including PN junctions at borders between upper portions that contact the first semiconductor layer via the third insulating film and lower portions that contact the first semiconductor layer via the third insulating film.