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    Boosting for non-volatile storage using channel isolation switching
    3.
    发明授权
    Boosting for non-volatile storage using channel isolation switching 有权
    使用通道隔离切换提升非易失性存储

    公开(公告)号：US07460404B1

    公开(公告)日：2008-12-02

    申请号：US11745082

    申请日：2007-05-07

    申请人： Yingda Dong ,  Jeffrey W. Lutze ,  Shih-Chung Lee ,  Gerrit Jan Hemink ,  Ken Oowada

    发明人： Yingda Dong ,  Jeffrey W. Lutze ,  Shih-Chung Lee ,  Gerrit Jan Hemink ,  Ken Oowada

    IPC分类号： G11C16/00

    CPC分类号： G11C16/12 ,  G11C16/0483

    摘要： Program disturb is reduced in non-volatile storage by preventing source side boosting in selected NAND strings. A self-boosting mode which includes an isolation word line is used. A channel area of an inhibited NAND string is boosted on a source side of the isolation word line before the channel is boosted on a drain side of the isolation word line. Further, storage elements near the isolation word line are kept in a conducting state during the source side boosting so that the source side channel is connected to the drain side channel. In this way, in selected NAND strings, source side boosting can not occur and thus program disturb due to source side boosting can be prevented. After the source side boosting, the source side channel is isolated from the drain side channel, and drain side boosting is performed.

    摘要翻译： 在非易失性存储器中通过防止所选择的NAND串中的源极升压来减少编程干扰。 使用包括隔离字线的自增强模式。 禁止的NAND串的通道区域在隔离字线的漏极侧的通道升压之前在隔离字线的源极侧被升压。 此外，在源侧升压期间，隔离字线附近的存储元件保持导通状态，使得源极侧沟道连接到漏极侧沟道。 以这种方式，在选择的NAND串中，不能发生源侧升压，因此可以防止由于源极侧升压而导致的编程干扰。 在源侧升压之后，源侧沟道与漏极侧沟道隔离，并且进行漏极侧升压。

    NON-VOLATILE STORAGE WITH BOOSTING USING CHANNEL ISOLATION SWITCHING
    4.
    发明申请
    NON-VOLATILE STORAGE WITH BOOSTING USING CHANNEL ISOLATION SWITCHING 有权
    使用通道隔离开关进行升压的非易失性存储

    公开(公告)号：US20080279008A1

    公开(公告)日：2008-11-13

    申请号：US11745092

    申请日：2007-05-07

    申请人： Yingda Dong ,  Jeffrey W. Lutze ,  Shih-Chung Lee ,  Gerrit Jan Hemink ,  Ken Oowada

    发明人： Yingda Dong ,  Jeffrey W. Lutze ,  Shih-Chung Lee ,  Gerrit Jan Hemink ,  Ken Oowada

    IPC分类号： G11C11/34

    CPC分类号： G11C8/08 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/3418 ,  G11C16/3427 ,  G11C2211/5621

    摘要： Non-volatile storage in which program disturb is reduced by preventing source side boosting in selected NAND strings. A self-boosting mode which includes an isolation word line is used. A channel area of an inhibited NAND string is boosted on a source side of the isolation word line before the channel is boosted on a drain side of the isolation word line. Further, storage elements near the isolation word line are kept in a conducting state during the source side boosting so that the source side channel is connected to the drain side channel. In this way, in selected NAND strings, source side boosting can not occur and thus program disturb due to source side boosting can be prevented. After the source side boosting, the source side channel is isolated from the drain side channel, and drain side boosting is performed.

    摘要翻译： 通过防止所选择的NAND串中的源极升压来减少编程干扰的非易失性存储。 使用包括隔离字线的自增强模式。 禁止的NAND串的通道区域在隔离字线的漏极侧的通道升压之前在隔离字线的源极侧被升压。 此外，在源侧升压期间，隔离字线附近的存储元件保持导通状态，使得源极侧沟道连接到漏极侧沟道。 以这种方式，在选择的NAND串中，不能发生源侧升压，因此可以防止由于源极侧升压而导致的编程干扰。 在源侧升压之后，源侧沟道与漏极侧沟道隔离，并且进行漏极侧升压。

    BOOSTING FOR NON-VOLATILE STORAGE USING CHANNEL ISOLATION SWITCHING
    5.
    发明申请
    BOOSTING FOR NON-VOLATILE STORAGE USING CHANNEL ISOLATION SWITCHING 有权
    使用通道隔离开关来促进非易失性存储

    公开(公告)号：US20080279007A1

    公开(公告)日：2008-11-13

    申请号：US11745082

    申请日：2007-05-07

    申请人： Yingda Dong ,  Jeffrey W. Lutze ,  Shih-Chung Lee ,  Gerrit Jan Hemink ,  Ken Oowada

    发明人： Yingda Dong ,  Jeffrey W. Lutze ,  Shih-Chung Lee ,  Gerrit Jan Hemink ,  Ken Oowada

    IPC分类号： G11C11/34

    CPC分类号： G11C16/12 ,  G11C16/0483

    摘要： Program disturb is reduced in non-volatile storage by preventing source side boosting in selected NAND strings. A self-boosting mode which includes an isolation word line is used. A channel area of an inhibited NAND string is boosted on a source side of the isolation word line before the channel is boosted on a drain side of the isolation word line. Further, storage elements near the isolation word line are kept in a conducting state during the source side boosting so that the source side channel is connected to the drain side channel. In this way, in selected NAND strings, source side boosting can not occur and thus program disturb due to source side boosting can be prevented. After the source side boosting, the source side channel is isolated from the drain side channel, and drain side boosting is performed.

    摘要翻译： 在非易失性存储器中通过防止所选择的NAND串中的源极升压来减少编程干扰。 使用包括隔离字线的自增强模式。 禁止的NAND串的通道区域在隔离字线的漏极侧的通道升压之前在隔离字线的源极侧被升压。 此外，在源侧升压期间，隔离字线附近的存储元件保持导通状态，使得源极侧沟道连接到漏极侧沟道。 以这种方式，在选择的NAND串中，不能发生源侧升压，因此可以防止由于源极侧升压而导致的编程干扰。 在源侧升压之后，源侧沟道与漏极侧沟道隔离，并且进行漏极侧升压。

    Non-volatile storage with boosting using channel isolation switching
    6.
    发明授权
    Non-volatile storage with boosting using channel isolation switching 有权
    使用通道隔离开关进行升压的非易失性存储

    公开(公告)号：US07463522B2

    公开(公告)日：2008-12-09

    申请号：US11745092

    申请日：2007-05-07

    申请人： Yingda Dong ,  Jeffrey W. Lutze ,  Shih-Chung Lee ,  Gerrit Jan Hemink ,  Ken Oowada

    发明人： Yingda Dong ,  Jeffrey W. Lutze ,  Shih-Chung Lee ,  Gerrit Jan Hemink ,  Ken Oowada

    IPC分类号： G11C16/00

    CPC分类号： G11C8/08 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/3418 ,  G11C16/3427 ,  G11C2211/5621

    摘要： Non-volatile storage in which program disturb is reduced by preventing source side boosting in selected NAND strings. A self-boosting mode which includes an isolation word line is used. A channel area of an inhibited NAND string is boosted on a source side of the isolation word line before the channel is boosted on a drain side of the isolation word line. Further, storage elements near the isolation word line are kept in a conducting state during the source side boosting so that the source side channel is connected to the drain side channel. In this way, in selected NAND strings, source side boosting can not occur and thus program disturb due to source side boosting can be prevented. After the source side boosting, the source side channel is isolated from the drain side channel, and drain side boosting is performed.

    摘要翻译： 通过防止所选择的NAND串中的源极升压来减少编程干扰的非易失性存储。 使用包括隔离字线的自增强模式。 禁止的NAND串的通道区域在隔离字线的漏极侧的通道升压之前在隔离字线的源极侧被升压。 此外，在源侧升压期间，隔离字线附近的存储元件保持导通状态，使得源极侧沟道连接到漏极侧沟道。 以这种方式，在选择的NAND串中，不能发生源侧升压，因此可以防止由于源极侧升压而导致的编程干扰。 在源侧升压之后，源侧沟道与漏极侧沟道隔离，并且进行漏极侧升压。

    Method for programming non-volatile memory with reduced program disturb using modified pass voltages
    9.
    发明授权
    Method for programming non-volatile memory with reduced program disturb using modified pass voltages 有权
    使用修改的通过电压对具有减少的编程干扰的非易失性存储器进行编程的方法

    公开(公告)号：US07355889B2

    公开(公告)日：2008-04-08

    申请号：US11313023

    申请日：2005-12-19

    申请人： Gerrit Jan Hemink ,  Ken Oowada

    发明人： Gerrit Jan Hemink ,  Ken Oowada

    IPC分类号： G11C11/34

    CPC分类号： G11C16/12 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/3418 ,  G11C16/3427 ,  G11C16/3459 ,  G11C2211/5621

    摘要： Non-volatile storage elements are programmed in a manner that reduces program disturb by using modified pass voltages. In particular, during the programming of a selected storage element associated with a selected word line, a higher pass voltage is applied to word lines associated with previously programmed non-volatile storage elements in the set than to word lines associated with unprogrammed and/or partly programmed non-volatile storage elements in the set. The pass voltage is sufficiently high to balance the channel potentials on the source and drain sides of the selected word line and/or to reduce leakage of charge between the boosted channel regions. Optionally, an isolation region is formed between the boosted channel regions by applying a reduced voltage on one or more word lines between the selected word line and the word lines that receive the higher pass voltage.

    摘要翻译： 非易失性存储元件以通过使用修改的通过电压来减少编程干扰的方式被编程。 特别地，在与所选择的字线相关联的所选择的存储元件的编程期间，将较高的通过电压施加到与组中的先前编程的非易失性存储元件相关联的字线，而不是与未编程和/或部分相关联的字线 在集合中编程的非易失性存储元件。 通过电压足够高以平衡所选字线的源极和漏极侧上的沟道电位和/或减小在升压的沟道区之间的电荷泄漏。 可选地，通过在所选择的字线和接收较高通过电压的字线之间的一个或多个字线上施加降低的电压，在升压的沟道区之间形成隔离区。