公开(公告)号：US20120085986A1

公开(公告)日：2012-04-12

申请号：US13321923

申请日：2010-06-09

Applicant: Junko Iwanaga ,  Toshiya Yokogawa ,  Atsushi Yamada

Inventor： Junko Iwanaga ,  Toshiya Yokogawa ,  Atsushi Yamada

IPC: H01L33/04

CPC classification number: H01L33/38 ,  H01L33/16 ,  H01L33/20 ,  H01L33/32 ,  H01L33/382

Abstract: The light-emitting diode element of this invention includes: an n-type GaN substrate (7), of which the principal surface (7a) is an m plane; and a multilayer structure on the principal surface (7a) of the substrate (7), which includes an n-type semiconductor layer (2), an active layer (3) on a first region (2a) of the upper surface of the n-type semiconductor layer (2), a p-type semiconductor layer (4), an anode electrode layer (5), and a cathode electrode layer (6) on a second region (2b) of the upper surface of the n-type semiconductor layer (2). These layers (2, 3, 4) have all been grown epitaxially through an m-plane growth. The n-type dopant concentration in the substrate (7) and n-type semiconductor layer (2) is 1×1018 cm−3 or less. When viewed perpendicularly to the principal surface (7a), a gap of 4 μm or less is left between the anode and cathode electrode layers (5, 6) and the anode electrode layer (5) is arranged at a distance of 45 μm or less from an edge of the cathode electrode layer (6) that faces the anode electrode layer (5).

Abstract translation: 本发明的发光二极管元件包括：主面（7a）为m面的n型GaN衬底（7）; 以及在基板（7）的主表面（7a）上的多层结构，其包括n型半导体层（2），在n的上表面的第一区域（2a）上的有源层（3） 型半导体层（2），p型半导体层（4），阳极电极层（5）以及在n型上表面的第二区域（2b）上的阴极电极层 半导体层（2）。 这些层（2,3,4）全部通过m平面生长而外延生长。 基板（7）和n型半导体层（2）中的n型掺杂剂浓度为1×1018cm -3以下。 当垂直于主表面（7a）观察时，在阳极和阴极电极层（5,6）之间留下4μm或更小的间隙，并且阳极电极层（5）被布置在45μm或更小的距离处 从所述阴极电极层（6）的与所述阳极电极层（5）相对的边缘。

公开(公告)号：US08421054B2

公开(公告)日：2013-04-16

申请号：US13351452

申请日：2012-01-17

Applicant: Junko Iwanaga ,  Toshiya Yokogawa ,  Atsushi Yamada

Inventor： Junko Iwanaga ,  Toshiya Yokogawa ,  Atsushi Yamada

IPC: H01L29/04 ,  H01L29/26

CPC classification number: H01L33/382 ,  H01L33/16 ,  H01L33/32

Abstract: A light-emitting diode element includes: an n-type conductive layer 2 being made of a gallium nitride-based compound, a principal surface being an m-plane; a semiconductor multilayer structure 21 provided on a first region 2a of the principal surface of the n-type conductive layer 2, the semiconductor multilayer structure 21 including a p-type conductive layer 4 and an active layer 3; a p-electrode 5 provided on the p-type conductive layer 4; a conductor portion 9 provided on a second region 2b of the principal surface of the n-type conductive layer 2, the conductor portion 9 being in contact with an inner wall of a through hole 8; and an n-type front surface electrode 6 provided on the second region 2b of the principal surface of the n-type conductive layer 2, the n-type front surface electrode 6 being in contact with the conductor portion 9.

Abstract translation: 发光二极管元件包括：n型导电层2，其由氮化镓基化合物制成，主表面为m面; 设置在n型导电层2的主表面的第一区域2a上的半导体多层结构21，包括p型导电层4和活性层3的半导体多层结构21; 设置在p型导电层4上的p电极5; 设置在n型导电层2的主表面的第二区域2b上的导体部分9，导体部分9与通孔8的内壁接触; 以及设置在n型导电层2的主表面的第二区域2b上的n型正面电极6，n型正面电极6与导体部分9接触。

公开(公告)号：US20120113656A1

公开(公告)日：2012-05-10

申请号：US13351452

申请日：2012-01-17

Applicant: Junko Iwanaga ,  Toshiya Yokogawa ,  Atsushi Yamada

Inventor： Junko Iwanaga ,  Toshiya Yokogawa ,  Atsushi Yamada

IPC: F21V21/00 ,  H01L33/38

CPC classification number: H01L33/382 ,  H01L33/16 ,  H01L33/32

Abstract: A light-emitting diode element includes: an n-type conductive layer 2 being made of a gallium nitride-based compound, a principal surface being an m-plane; a semiconductor multilayer structure 21 provided on a first region 2a of the principal surface of the n-type conductive layer 2, the semiconductor multilayer structure 21 including a p-type conductive layer 4 and an active layer 3; a p-electrode 5 provided on the p-type conductive layer 4; a conductor portion 9 provided on a second region 2b of the principal surface of the n-type conductive layer 2, the conductor portion 9 being in contact with an inner wall of a through hole 8; and an n-type front surface electrode 6 provided on the second region 2b of the principal surface of the n-type conductive layer 2, the n-type front surface electrode 6 being in contact with the conductor portion 9.

Abstract translation: 发光二极管元件包括：n型导电层2，其由氮化镓基化合物制成，主表面为m面; 设置在n型导电层2的主表面的第一区域2a上的半导体多层结构21，包括p型导电层4和活性层3的半导体多层结构21; 设置在p型导电层4上的p电极5; 设置在n型导电层2的主表面的第二区域2b上的导体部分9，导体部分9与通孔8的内壁接触; 以及设置在n型导电层2的主表面的第二区域2b上的n型正面电极6，n型正面电极6与导体部分9接触。

公开(公告)号：US08587022B2

公开(公告)日：2013-11-19

申请号：US13256061

申请日：2010-12-27

Applicant: Akira Inoue ,  Junko Iwanaga ,  Ryou Kato ,  Masaki Fujikane ,  Toshiya Yokogawa

Inventor： Akira Inoue ,  Junko Iwanaga ,  Ryou Kato ,  Masaki Fujikane ,  Toshiya Yokogawa

IPC: H01L33/00

CPC classification number: H01L33/14 ,  H01L33/0075 ,  H01L33/32 ,  H01L2224/13 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2224/49107 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A nitride-based semiconductor light-emitting device 31 includes: an n-type GaN substrate 1 which has an m-plane principal surface; a current diffusing layer 7 provided on the n-type GaN substrate 1; an n-type nitride semiconductor layer 2 provided on the current diffusing layer 7; an active layer 3 provided on the n-type nitride semiconductor layer 2; a p-type nitride semiconductor layer 4 provided on the active layer 3; a p-electrode 5 which is in contact with the p-type nitride semiconductor layer 4; and an n-electrode 6 which is in contact with the n-type GaN substrate 1 or the n-type nitride semiconductor layer 2. The donor impurity concentration of the n-type nitride semiconductor layer 2 is not more than 5×1018 cm−3, and the donor impurity concentration of the current diffusing layer 7 is ten or more times the donor impurity concentration of the n-type nitride semiconductor layer 2.

Abstract translation: 氮化物系半导体发光元件31具备：具有m面主面的n型GaN衬底1， 设置在n型GaN衬底1上的电流扩散层7; 设置在电流扩散层7上的n型氮化物半导体层2; 设置在n型氮化物半导体层2上的有源层3; 设置在有源层3上的p型氮化物半导体层4; 与p型氮化物半导体层4接触的p电极5; 以及与n型GaN衬底1或n型氮化物半导体层2接触的n电极6.n型氮化物半导体层2的施主杂质浓度不大于5×1018cm- 3，电流扩散层7的施主杂质浓度为n型氮化物半导体层2的施主杂质浓度的十倍以上。

公开(公告)号：US20130214288A1

公开(公告)日：2013-08-22

申请号：US13880027

申请日：2012-05-02

Applicant: Toshiya Yokogawa ,  Junko Iwanaga ,  Akira Inoue

Inventor： Toshiya Yokogawa ,  Junko Iwanaga ,  Akira Inoue

IPC: H01L33/32

CPC classification number: H01L33/32 ,  H01L33/02 ,  H01L33/16

Abstract: A nitride-based semiconductor light-emitting device of an embodiment includes a semiconductor multilayer structure having a growing plane which is an m-plane and being made of a GaN-based semiconductor. The semiconductor multilayer structure includes a n-type semiconductor layer, a p-type semiconductor layer, a p-side electrode provided on the p-type semiconductor layer, and an active layer interposed between the n-type semiconductor layer and the p-type semiconductor layer. The ratio of the thickness of the active layer to the thickness of the n-type semiconductor layer, D, is in the range of 1.8×10−4≦D≦14.1×10−4. The area of the p-side electrode, S, is in the range of 1×102 μm2≦S≦9×104 μm2. A maximum current density which leads to 88% of a maximum of the external quantum efficiency is not less than 2 A/mm2.

Abstract translation: 实施方式的氮化物系半导体发光元件具有半导体层叠结构，该半导体层叠结构具有作为m面的生长面并由GaN系半导体构成。 半导体多层结构包括n型半导体层，p型半导体层，设置在p型半导体层上的p侧电极以及介于n型半导体层和p型半导体层之间的有源层 半导体层。 有源层的厚度与n型半导体层的厚度D之比在1.8×10 -4 @ D @ 14.1×10 -4的范围内。 p侧电极S的面积在1×102mum2 @ S @ 9×104mum2的范围内。 导致外部量子效率最大值的88％的最大电流密度不小于2A / mm2。

公开(公告)号：US08823026B2

公开(公告)日：2014-09-02

申请号：US13880027

申请日：2012-05-02

Applicant: Toshiya Yokogawa ,  Junko Iwanaga ,  Akira Inoue

Inventor： Toshiya Yokogawa ,  Junko Iwanaga ,  Akira Inoue

IPC: H01L33/00 ,  H01L33/32 ,  H01L33/02 ,  H01L33/16

CPC classification number: H01L33/32 ,  H01L33/02 ,  H01L33/16

Abstract: A nitride-based semiconductor light-emitting device of an embodiment includes a semiconductor multilayer structure having a growing plane which is an m-plane and being made of a GaN-based semiconductor. The semiconductor multilayer structure includes a n-type semiconductor layer, a p-type semiconductor layer, a p-side electrode provided on the p-type semiconductor layer, and an active layer interposed between the n-type semiconductor layer and the p-type semiconductor layer. The ratio of the thickness of the active layer to the thickness of the n-type semiconductor layer, D, is in the range of 1.8×10−4≦D≦14.1×10−4. The area of the p-side electrode, S, is in the range of 1×102 μm2≦S≦9×104 μm2. A maximum current density which leads to 88% of a maximum of the external quantum efficiency is not less than 2 A/mm2.

Abstract translation: 实施方式的氮化物系半导体发光元件具有半导体层叠结构，该半导体层叠结构具有作为m面的生长面并由GaN系半导体构成。 半导体多层结构包括n型半导体层，p型半导体层，设置在p型半导体层上的p侧电极以及介于n型半导体层和p型半导体层之间的有源层 半导体层。 有源层的厚度与n型半导体层的厚度D的比值在1.8×10-4＆lt; 1lE; D＆nlE; 14.1×10-4的范围内。 p侧电极S的面积在1×102μm2＆amp; NlE; S＆NlE; 9×104μm2的范围内。 导致外部量子效率最大值的88％的最大电流密度不小于2A / mm2。

公开(公告)号：US20120001223A1

公开(公告)日：2012-01-05

申请号：US13256061

申请日：2010-12-27

Applicant: Akira Inoue ,  Junko Iwanaga ,  Ryou Kato ,  Masaki Fujikane ,  Toshiya Yokogawa

Inventor： Akira Inoue ,  Junko Iwanaga ,  Ryou Kato ,  Masaki Fujikane ,  Toshiya Yokogawa

IPC: H01L33/32

CPC classification number: H01L33/14 ,  H01L33/0075 ,  H01L33/32 ,  H01L2224/13 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2224/49107 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A nitride-based semiconductor light-emitting device 31 includes: an n-type GaN substrate 1 which has an m-plane principal surface; a current diffusing layer 7 provided on the n-type GaN substrate 1; an n-type nitride semiconductor layer 2 provided on the current diffusing layer 7; an active layer 3 provided on the n-type nitride semiconductor layer 2; a p-type nitride semiconductor layer 4 provided on the active layer 3; a p-electrode 5 which is in contact with the p-type nitride semiconductor layer 4; and an n-electrode 6 which is in contact with the n-type GaN substrate 1 or the n-type nitride semiconductor layer 2. The donor impurity concentration of the n-type nitride semiconductor layer 2 is not more than 5×1018 cm−3, and the donor impurity concentration of the current diffusing layer 7 is ten or more times the donor impurity concentration of the n-type nitride semiconductor layer 2.

Abstract translation: 氮化物系半导体发光元件31具备：具有m面主面的n型GaN衬底1， 设置在n型GaN衬底1上的电流扩散层7; 设置在电流扩散层7上的n型氮化物半导体层2; 设置在n型氮化物半导体层2上的有源层3; 设置在有源层3上的p型氮化物半导体层4; 与p型氮化物半导体层4接触的p电极5; 以及与n型GaN衬底1或n型氮化物半导体层2接触的n电极6.n型氮化物半导体层2的施主杂质浓度不大于5×1018cm- 3，电流扩散层7的施主杂质浓度为n型氮化物半导体层2的施主杂质浓度的十倍以上。

公开(公告)号：US20060208300A1

公开(公告)日：2006-09-21

申请号：US10549291

申请日：2004-03-19

Applicant: Junko Iwanaga ,  Takeshi Takagi ,  Yoshihiko Kanzawa ,  Haruyuki Sorada ,  Tohru Saitoh ,  Takahiro Kawashima

Inventor： Junko Iwanaga ,  Takeshi Takagi ,  Yoshihiko Kanzawa ,  Haruyuki Sorada ,  Tohru Saitoh ,  Takahiro Kawashima

IPC: H01L27/108

CPC classification number: H01L29/785 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/66795

Abstract: A semiconductor device includes: a semiconductor substrate in which a trench is formed; a source region and a drain region each of which is buried in the trench and contains an impurity of the same conductive type; a semiconductor FIN buried in the trench and provided between the source and drain regions; a gate insulating film provided on a side surface of the semiconductor FIN as well as the upper surface of the semiconductor FIN; and a gate electrode formed on the gate insulating film.

Abstract translation: 一种半导体器件包括：形成沟槽的半导体衬底; 源极区域和漏极区域，每个源极区域和漏极区域被埋在沟槽中并且包含相同导电类型的杂质; 掩埋在沟槽中并设置在源区和漏区之间的半导体FIN; 设置在半导体FIN的侧表面上的栅极绝缘膜以及半导体FIN的上表面; 以及形成在栅极绝缘膜上的栅电极。

公开(公告)号：US07473967B2

公开(公告)日：2009-01-06

申请号：US10558671

申请日：2004-05-31

Applicant: Haruyuki Sorada ,  Takeshi Takagi ,  Akira Asai ,  Yoshihiko Kanzawa ,  Kouji Katayama ,  Junko Iwanaga

Inventor： Haruyuki Sorada ,  Takeshi Takagi ,  Akira Asai ,  Yoshihiko Kanzawa ,  Kouji Katayama ,  Junko Iwanaga

IPC: H01L27/088

CPC classification number: H01L29/785 ,  H01L29/66795 ,  H01L29/78687

Abstract: A semiconductor device according to this invention includes: a first insulating layer (11); a first body section (13) including an island-shaped semiconductor formed on the first insulating layer; a second body section (14) including an island-shaped semiconductor formed on the first insulating layer; a ridge-shaped connecting section (15) formed on the first insulating layer to interconnect the first body section and the second body section; a channel region (15a) formed by at least a part of the connecting section in lengthwise direction of the connecting section; a gate electrode (18) formed to cover a periphery of the channel region, with a second insulating layer intervening therebetween; a source region formed to extend over the first body section and a portion of the connecting section between the first body section and the channel region; and a drain region formed to extend over the second body section and a portion of the connecting section between the second body section and the channel region, wherein a semiconductor forming the channel region has a lattice strain.

Abstract translation: 根据本发明的半导体器件包括：第一绝缘层（11）; 第一主体部分（13），其包括形成在所述第一绝缘层上的岛状半导体; 包括形成在所述第一绝缘层上的岛状半导体的第二主体部分（14） 形成在第一绝缘层上以互连第一主体部分和第二主体部分的脊形连接部分（15）; 由连接部的长度方向的至少一部分形成的通道区域（15a）; 形成为覆盖沟道区域的周边的栅极电极（18），其间插入有第二绝缘层; 形成为在第一主体部分上延伸的源极区域和在第一主体部分和沟道区域之间的连接部分的一部分; 以及形成为在第二主体部分上延伸的漏极区域和在第二主体部分和沟道区域之间的连接部分的一部分，其中形成沟道区域的半导体具有晶格应变。

公开(公告)号：US08486788B2

公开(公告)日：2013-07-16

申请号：US13162310

申请日：2011-06-16

Applicant: Junko Iwanaga ,  Takeshi Takagi ,  Yoshihiko Kanzawa ,  Haruyuki Sorada ,  Tohru Saitoh ,  Takahiro Kawashima

Inventor： Junko Iwanaga ,  Takeshi Takagi ,  Yoshihiko Kanzawa ,  Haruyuki Sorada ,  Tohru Saitoh ,  Takahiro Kawashima

IPC: H01L21/336

CPC classification number: H01L29/785 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/66795

Abstract: A semiconductor device includes: a semiconductor substrate in which a trench is formed; a source region and a drain region each of which is buried in the trench and contains an impurity of the same conductive type; a semiconductor FIN buried in the trench and provided between the source and drain regions; a gate insulating film provided on a side surface of the semiconductor FIN as well as the upper surface of the semiconductor FIN; and a gate electrode formed on the gate insulating film.

Abstract translation: 一种半导体器件包括：形成沟槽的半导体衬底; 源极区域和漏极区域，每个源极区域和漏极区域被埋在沟槽中并且包含相同导电类型的杂质; 掩埋在沟槽中并设置在源区和漏区之间的半导体FIN; 设置在半导体FIN的侧表面上的栅极绝缘膜以及半导体FIN的上表面; 以及形成在栅极绝缘膜上的栅电极。