公开(公告)号：US20090201256A1

公开(公告)日：2009-08-13

申请号：US11577685

申请日：2005-10-14

Applicant: Jong-Sik Jeong ,  Byoung-ok Lee

Inventor： Jong-Sik Jeong ,  Byoung-ok Lee

IPC: G06F3/041

CPC classification number: G06F3/042 ,  G06F3/04886 ,  H04M1/23

Abstract: The present invention is directed to a portable terminal having inputting means using an image sensor and its input method. The portable terminal according to an embodiment of the present invention comprises a transparent solid plate mounted in a keypad area; an image sensor having unit cells of lattice type outputting an electrical signal corresponding to the light irradiated through the transparent solid plate; and a key selection recognizer generating and outputting a key button selection signal corresponding to the location of a unit cell that outputted the least electrical signal value by making reference to the size of the value of the electrical signal inputted from the unit cells. The present invention enables compacting of portable terminals owing to eliminating the need to design key buttons to match the size of human fingers.

Abstract translation: 本发明涉及具有使用图像传感器的输入装置及其输入方法的便携式终端。 根据本发明的实施例的便携式终端包括安装在键盘区域中的透明固体板; 具有晶格型单位单元的图像传感器，输出与通过透明固体板照射的光对应的电信号; 以及键选择识别器，通过参照从单位单元输入的电信号的值的大小，生成并输出与输出最小电信号值的单元的位置对应的按键选择信号。 本发明能够实现便携式终端的压实，这是由于不需要设计按钮来匹配人的手指的尺寸。

公开(公告)号：US20100115170A1

公开(公告)日：2010-05-06

申请号：US12524514

申请日：2008-01-24

Applicant: Jong-Sik Jeong

Inventor： Jong-Sik Jeong

IPC: G06F13/28 ,  G06F13/36

CPC classification number: G06F15/163 ,  G06F13/1663

Abstract: A chip having integrated multiple processor cores and a data processing method are disclosed. The processor chip includes an MP core (main processor core), an AP core (application processor core) which performs a processing function designated by a control of the MP core, a first SM controller which sets a path such that the MP core is coupled with a shared memory, and a second SM controller which sets a path such that the AP core is coupled with the shared memory. By virtue of the present invention, the number of chips installed can be minimized, to allow efficient utilization of PCB space and enable a compact size for a portable terminal.

Abstract translation: 公开了具有集成多个处理器核心和数据处理方法的芯片。 处理器芯片包括MP核（主处理器核心），执行由MP核心的控制指定的处理功能的AP核心（应用处理器核心）;第一SM控制器，其设置使得MP核心耦合的路径 具有共享存储器，以及第二SM控制器，其设置路径使得AP核与共享存储器耦合。 凭借本发明，可以最小化安装的芯片数量，以便有效地利用PCB空间，并且能够实现便携式终端的紧凑尺寸。

公开(公告)号：US20090254713A1

公开(公告)日：2009-10-08

申请号：US11909121

申请日：2005-09-22

Applicant: Jong-Sik Jeong

Inventor： Jong-Sik Jeong

IPC: G06F12/00

CPC classification number: G06F13/1605 ,  G11C8/16

Abstract: A method for controlling multiple access to partitioned areas of a shared memory and a portable terminal having the shared memory are disclosed. According to an embodiment of the present invention, the storage area of a shared memory is partitioned to a plurality of storage areas, and each control unit accesses a storage area through each access port to store data and transfers an authority to access the pertinent storage area to the other control unit, thereby allowing access by the other control unit. With the present invention, the data communication time between the plurality of control units can be minimized, and the process efficiency of each control unit can be optimized.

Abstract translation: 公开了一种用于控制对共享存储器的分割区域的多次访问的方法和具有共享存储器的便携式终端。 根据本发明的实施例，共享存储器的存储区被分割成多个存储区域，并且每个控制单元通过每个访问端口访问存储区域以存储数据并传送权限以访问相关的存储区域 到另一个控制单元，从而允许另一控制单元访问。 利用本发明，可以使多个控制单元之间的数据通信时间最小化，并且可以优化每个控制单元的处理效率。

公开(公告)号：US07301573B2

公开(公告)日：2007-11-27

申请号：US10680700

申请日：2003-10-07

Applicant: Sang-Hyun Park ,  Jong-Sik Jeong ,  Yeon-Cheol Lee ,  Kang-ju Kim ,  Hyung-Man Park ,  Boo-Dong Kwak

Inventor： Sang-Hyun Park ,  Jong-Sik Jeong ,  Yeon-Cheol Lee ,  Kang-ju Kim ,  Hyung-Man Park ,  Boo-Dong Kwak

IPC: H04N5/208 ,  G06K9/40

CPC classification number: G06T3/403 ,  H04N5/142 ,  H04N5/208 ,  H04N9/646

Abstract: An apparatus for and a method of simultaneously performing edge detection and enhancement without any additional memory storage include an image sensor sensing an image to output image data, a line buffer receiving the image data to output the image data, a register storing the image data transmitted from the line buffer, an interpolation unit performing an interpolation operation on the image data received from the register, an edge detection unit performing an edge detection operation on the image data received from the register to output an edge detection signal in parallel to the interpolation operation of the interpolation unit according to a selection signal representing a pattern of the image data stored in the register, and an edge enhancement unit enhancing an output of the interpolation unit according to the edge detection unit of the edge detection unit.

Abstract translation: 用于同时进行边缘检测和增强而没有任何附加存储器存储的装置和方法包括：感测图像以输出图像数据的图像传感器，接收图像数据以输出图像数据的行缓冲器，存储发送的图像数据的寄存器 从行缓冲器中，对从寄存器接收的图像数据执行内插运算的内插单元，对从寄存器接收的图像数据执行边缘检测操作的边缘检测单元，并行地输出边缘检测信号， 根据表示存储在寄存器中的图像数据的图案的选择信号，根据边缘检测单元的边缘检测单元增强插值单元的输出的边缘增强单元。

公开(公告)号：US06275456B1

公开(公告)日：2001-08-14

申请号：US09222829

申请日：1998-12-30

Applicant: Jong-Sik Jeong

Inventor： Jong-Sik Jeong

IPC: G11B7005

CPC classification number: G11B20/10 ,  G11B7/0037 ,  G11B20/1883 ,  G11B20/1889 ,  G11B2220/20

Abstract: A method of processing data of a defect sector in a DVD-RAM (Digital Video Disk-Random Access Memory) system and the DVD-RAM system. In the method, a defect list is read from a lead-in area of a DVD-RAM disk during playback of the disk and stored in a predetermined area of a memory of a signal processing portion in the system. A sector having the title of a user-input file is searched, a physical sector address for the searched sector is designated, the defect list is read, and it is determined whether the physical sector address is in the defect list. Then, sector data corresponding to the physical sector address is stored in the memory of the signal processing portion if the physical sector address is not in the defect list, and otherwise, no sector data corresponding to the physical sector address is stored in the memory.

Abstract translation: 一种处理DVD-RAM（数字视盘 - 随机存取存储器）系统和DVD-RAM系统的缺陷扇区的数据的方法。 在该方法中，在盘的回放期间从DVD-RAM盘的引入区读取缺陷列表，并存储在系统中的信号处理部的存储器的预定区域中。 搜索具有用户输入文件的标题的扇区，指定搜索到的扇区的物理扇区地址，读取缺陷列表，并确定物理扇区地址是否在缺陷列表中。 然后，如果物理扇区地址不在缺陷列表中，则对应于物理扇区地址的扇区数据被存储在信号处理部分的存储器中，否则，没有对应于物理扇区地址的扇区数据被存储在存储器中。

公开(公告)号：US06269220B1

公开(公告)日：2001-07-31

申请号：US08866570

申请日：1997-06-02

Applicant: Jong-Sik Jeong ,  Jae-Seong Shim ,  Chan-Dong Cho ,  Byung-Jun Kim

Inventor： Jong-Sik Jeong ,  Jae-Seong Shim ,  Chan-Dong Cho ,  Byung-Jun Kim

IPC: H04N726

CPC classification number: G11B20/10527 ,  G11B20/18 ,  G11B20/1813 ,  G11B2020/1062 ,  H04N19/423 ,  H04N19/61

Abstract: Disclosed is an inexpensive and miniaturized digital video disc playback device having a system decoder capable of error correcting and data buffering by means of a single memory without employing separate error correcting and data buffering memories. The inventive system decoder for demodulating, error correcting, deinterleaving and descrambling of data reproduced from a disc in the digital video disc playback device, includes a memory and a memory controller for generating memory control signals for accessing the memory to record and read data when demodulating, error correcting and descrambling the reproduced data.

Abstract translation: 公开了一种便宜且小型化的数字视频光盘播放装置，其具有能够通过单个存储器进行纠错和数据缓冲的系统解码器，而不采用单独的纠错和数据缓冲存储器。 本发明的系统解码器用于从数字视频盘播放设备中的盘再现的数据的解调，纠错，解交织和解扰，包括存储器和存储器控制器，用于产生用于访问存储器的存储器控​​制信号，以在解调时记录和读取数据 ，对再现的数据进行纠错和解扰。

公开(公告)号：US08266417B2

公开(公告)日：2012-09-11

申请号：US12375447

申请日：2007-08-22

Applicant: Jong-Sik Jeong

Inventor： Jong-Sik Jeong

IPC: G06F12/00 ,  G06F13/00 ,  G06F13/28

CPC classification number: G06F9/4403

Abstract: The present invention relates to a device having a shared memory and a code data transmitting method. According to an embodiment of the present invention, the digital processing device can include n processors, n being a natural number of 2 or greater; and a shared memory, coupled to each of the processors through independent buses and having a boot section allotted, the boot section being for writing a boot program code to be used for booting of at least one processor.

Abstract translation: 本发明涉及具有共享存储器和代码数据发送方法的装置。 根据本发明的实施例，数字处理装置可以包括n个处理器，n是2或更大的自然数; 以及共享存储器，其通过独立总线耦合到每个处理器并且具有分配的引导部分，所述引导部分用于写入要用于引导至少一个处理器的引导程序代码。

公开(公告)号：US20090254715A1

公开(公告)日：2009-10-08

申请号：US11909085

申请日：2005-09-15

Applicant: Jong-Sik Jeong

Inventor： Jong-Sik Jeong

IPC: G06F12/02 ,  G06F12/00

CPC classification number: G06F12/0292 ,  G06F12/0692 ,  G06F13/1684

Abstract: A method and device for varying the size of partitioned areas of a shared memory is disclosed. The present invention resets the size of partitioned areas by expanding the size of a shared area when data that is larger than the writable area of the shared area is to be written, after the storage area of a memory unit is partitioned to a plurality of partitioned areas by a main control unit. The memory unit is coupled with a main control unit and a supplementary control unit through independent ports. With the present invention, the data communication time between control units for processing data can be minimized, and the operation speed of each control unit can be optimized.

Abstract translation: 公开了一种用于改变共享存储器的分区的大小的方法和装置。 本发明在将存储单元的存储区域划分成多个分区后，通过扩展共享区域的大小来重置大小分割区域的大小，该数据大于共享区域的可写入区域的数据 区域由主控制单元。 存储单元通过独立端口与主控制单元和辅助控制单元耦合。 利用本发明，可以最小化用于处理数据的控制单元之间的数据通信时间，并且可以优化每个控制单元的操作速度。

公开(公告)号：US20080222369A1

公开(公告)日：2008-09-11

申请号：US11995567

申请日：2006-06-13

Applicant: Jong-Sik Jeong

Inventor： Jong-Sik Jeong

IPC: G06F12/00

CPC classification number: G06F12/1458 ,  H04W88/02

Abstract: A method for controlling multiple access to partitioned areas of a shared memory and a digital processing apparatus having the shared memory are disclosed. According to embodiments of the present invention, the storage area of a shared memory is partitioned to a plurality of storage areas, and each processor accesses a storage area through each access port to store data and transfers an authority to access the pertinent storage area to the other processor, thereby allowing access by the other processor. With the present invention, the data communication time between the plurality of processors can be minimized, and the process efficiency of each processor can be optimized.

Abstract translation: 公开了一种用于控制对共享存储器的分区的多次访问的方法和具有共享存储器的数字处理装置。 根据本发明的实施例，共享存储器的存储区域被划分为多个存储区域，并且每个处理器通过每个访问端口访问存储区域以存储数据并传送权限以访问相关存储区域 从而允许其他处理器访问。 利用本发明，可以使多个处理器之间的数据通信时间最小化，并且可以优化每个处理器的处理效率。

公开(公告)号：US06282367B1

公开(公告)日：2001-08-28

申请号：US09007654

申请日：1998-01-15

Applicant: Chan-Dong Cho ,  Jae-Seong Shim ,  Jong-Sik Jeong ,  Byung-Jun Kim

Inventor： Chan-Dong Cho ,  Jae-Seong Shim ,  Jong-Sik Jeong ,  Byung-Jun Kim

IPC: H04N5781

CPC classification number: G11B20/18 ,  G11B20/10527 ,  H04N5/85 ,  H04N9/8042

Abstract: A system decoder for high-speed data transmission in an optical disc reproducing apparatus. The system decoder includes a track buffer memory; a first FIFO (first-in, first-out) memory for receiving data descrambled and error-detected and outputting the data by a unit of plural words; a second FIFO memory for receiving data from the track buffer memory and outputting the data by the unit of plural words; and a track buffer controller writing the data in the first FIFO memory into the track buffer memory in a page mode, and reading the data written in the track buffer memory in a page mode to output the read data to the second FIFO memory. The track buffer memory includes a data area into which main data is written; an error information area into which error information for the main data is written; and a microcomputer area into which a microcomputer of the optical disc reproducing apparatus writes data.

Abstract translation: 一种用于在光盘再现装置中进行高速数据传输的系统解码器。 系统解码器包括轨道缓冲存储器; 第一FIFO（先进先出）存储器，用于接收解扰和错误检测的数据，并以多个字单位输出数据; 第二FIFO存储器，用于从轨道缓冲存储器接收数据，并以多个单位单位输出数据; 以及轨道缓冲器控制器，其以页面模式将第一FIFO存储器中的数据写入轨道缓冲存储器，并且以页面模式读取写入轨道缓冲存储器中的数据，以将读取的数据输出到第二FIFO存储器。 轨道缓冲存储器包括写入主数据的数据区域; 写入主数据的错误信息的错误信息区域; 以及光盘再现装置的微型计算机写入数据的微型计算机区域。