公开(公告)号：US08725955B2

公开(公告)日：2014-05-13

申请号：US12524514

申请日：2008-01-24

Applicant: Jong-Sik Jeong

Inventor： Jong-Sik Jeong

IPC: G06F12/00

CPC classification number: G06F15/163 ,  G06F13/1663

Abstract: A chip having integrated multiple processor cores and a data processing method are disclosed. The processor chip includes an MP core (main processor core), an AP core (application processor core) which performs a processing function designated by a control of the MP core, a first SM controller which sets a path such that the MP core is coupled with a shared memory, and a second SM controller which sets a path such that the AP core is coupled with the shared memory. By virtue of the present invention, the number of chips installed can be minimized, to allow efficient utilization of PCB space and enable a compact size for a portable terminal.

Abstract translation: 公开了具有集成多个处理器核心和数据处理方法的芯片。 处理器芯片包括MP核（主处理器核心），执行由MP核心的控制指定的处理功能的AP核心（应用处理器核心）;第一SM控制器，其设置使得MP核心耦合的路径 具有共享存储器，以及第二SM控制器，其设置路径使得AP核与共享存储器耦合。 凭借本发明，可以最小化安装的芯片数量，以便有效地利用PCB空间，并且能够实现便携式终端的紧凑尺寸。

公开(公告)号：US08200911B2

公开(公告)日：2012-06-12

申请号：US12307049

申请日：2007-08-10

Applicant: Jong-Sik Jeong

Inventor： Jong-Sik Jeong

IPC: G06F12/00 ,  G06F13/00 ,  G06F13/28

CPC classification number: G06F9/544

Abstract: A device having a shared memory and a shared memory controlling method are disclosed. A digital processing device can include a shared memory, having a storage area including at least one common section, coupled to each of the processors through separate buses and outputting access information to whether a processor is accessing a common section. With the present invention, each processor can efficiently use or/and control a shared memory by using access information.

Abstract translation: 公开了具有共享存储器和共享存储器控制方法的设备。 数字处理设备可以包括共享存储器，其具有包括至少一个公共部分的存储区域，其通过单独的总线耦合到每个处理器，并且输出访问信息以确定处理器是否正在访问公共区段。 利用本发明，每个处理器可以通过使用访问信息有效地使用或/和控制共享存储器。

公开(公告)号：US08145852B2

公开(公告)日：2012-03-27

申请号：US12296079

申请日：2007-04-06

Applicant: Jong-Sik Jeong

Inventor： Jong-Sik Jeong

IPC: G06F15/167

CPC classification number: G06F13/1663

Abstract: A device having a shared memory and a method for providing access status information by the shared memory are disclosed. A digital processing device includes n processors and a shared memory. The shared memory is coupled to each processor though a separate bus, its storage area includes m common sections, and generates and outputs access status information related to whether an arbitrary processor is accessing at least one of the common sections. With the present invention, a control sequence of each processor can be simplified at a maximum by allowing the shared memory to generate and output access status information related to the common sections.

Abstract translation: 公开了一种具有共享存储器的设备和用于由共享存储器提供访问状态信息的方法。 数字处理装置包括n个处理器和一个共享存储器。 共享存储器通过单独的总线耦合到每个处理器，其存储区域包括m个公共部分，并且生成并输出与任意处理器是否访问至少一个公共部分有关的访问状态信息。 利用本发明，通过允许共享存储器生成和输出与公共部分有关的访问状态信息，可以最大限度地简化每个处理器的控制序列。

公开(公告)号：US20110271081A1

公开(公告)日：2011-11-03

申请号：US13184219

申请日：2011-07-15

Applicant: You-Hoan Jung ,  Jong-Sik Jeong

Inventor： You-Hoan Jung ,  Jong-Sik Jeong

IPC: G06F9/00

CPC classification number: G06F15/16 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A multimedia platform is discussed, which includes a first stacking unit including a first substrate and a multimedia processor, wherein the first substrate and the multimedia processor are stacked on the first stacking unit, a pattern and a via hole are formed on the first substrate, and the multimedia processor is mounted on top of the first substrate; a second stacking unit including a second substrate and a plurality of storage devices, wherein the second substrate and the plurality of storage devices are stacked on the second stacking unit, a pattern and a via hole being formed on the second substrate, and the plurality of storage devices are mounted on top of the second substrate; and at least one solder ball arranged on the first stacking unit, the at least one solder ball allowing the first substrate to be coupled to the second substrate.

Abstract translation: 讨论了一种多媒体平台，其包括包括第一基板和多媒体处理器的第一堆叠单元，其中第一基板和多媒体处理器堆叠在第一堆叠单元上，在第一基板上形成图案和通孔， 并且所述多媒体处理器安装在所述第一基板的顶部上; 第二堆叠单元，包括第二基板和多个存储装置，其中所述第二基板和所述多个存储装置堆叠在所述第二堆叠单元上，形成在所述第二基板上的图案和通孔， 存储装置安装在第二基板的顶部上; 以及布置在所述第一堆叠单元上的至少一个焊球，所述至少一个焊球允许所述第一衬底耦合到所述第二衬底。

公开(公告)号：US08051264B2

公开(公告)日：2011-11-01

申请号：US12159184

申请日：2006-12-21

Applicant: Jong-Sik Jeong ,  Se-Jin Kang

Inventor： Jong-Sik Jeong ,  Se-Jin Kang

IPC: G06F13/10

CPC classification number: G06F12/1458 ,  G06F13/1663

Abstract: A portable terminal and a method of controlling a shared memory, the portable terminal are disclosed. The portable terminal includes a memory unit, being equipped with at least 2 ports and having a storage block partitioned into partitioned blocks in a quantity of n, and a plurality of processors, reading or writing data by accessing a particular partitioned block through each dedicated port. At least one of the partitioned blocks is assigned to a common storage block, accessible by a processor having an access privilege, and the access privilege is transferred between the plurality of processors. The common storage block can be partitioned into k sub partitioned blocks, which the data type and process to be stored are predetermined. With the present invention, in the case of the common storage block for the plurality of processors, by allowing the partitioned storage blocks to be partitioned again into sub partitioned blocks depending on a type of data to be stored, the data processing/transmission speed and efficiency can be optimized.

Abstract translation: 公开了便携式终端和控制共享存储器的方法。 便携式终端包括：具有至少2个端口的存储器单元，并且具有划分成n个数量的分区块的存储块和多个处理器，通过每个专用端口访问特定分区块来读取或写入数据 。 分配块中的至少一个被分配给公共存储块，可由具有访问权限的处理器访问，并且在多个处理器之间传送访问特权。 公共存储块可以被划分为k个子分区块，其中要存储的数据类型和处理被预先确定。 通过本发明，在多个处理器的共用存储块的情况下，通过根据要存储的数据的类型，将分割的存储块再次分割成子分区块，将数据处理/传输速度和 效率可以优化。

公开(公告)号：US20100005284A1

公开(公告)日：2010-01-07

申请号：US12375447

申请日：2007-08-22

Applicant: Jong-Sik Jeong

Inventor： Jong-Sik Jeong

IPC: G06F15/177 ,  G06F12/00

CPC classification number: G06F9/4403

Abstract: The present invention relates to a device having a shared memory and a code data transmitting method. According to an embodiment of the present invention, the digital processing device can include n processors, n being a natural number of 2 or greater; and a shared memory, coupled to each of the processors through independent buses and having a boot section allotted, the boot section being for writing a boot program code to be used for booting of at least one processor.

Abstract translation: 本发明涉及具有共享存储器和代码数据发送方法的装置。 根据本发明的实施例，数字处理装置可以包括n个处理器，n是2或更大的自然数; 以及共享存储器，其通过独立总线耦合到每个处理器并且具有分配的引导部分，所述引导部分用于写入要用于引导至少一个处理器的引导程序代码。

公开(公告)号：US20080288711A1

公开(公告)日：2008-11-20

申请号：US12066747

申请日：2006-09-04

Applicant: You-Hoan Jung ,  Jong-Sik Jeong

Inventor： You-Hoan Jung ,  Jong-Sik Jeong

IPC: G06F9/02 ,  G06F12/00 ,  G06F15/76

CPC classification number: G06F15/16 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A device comprising a multimedia platform with a plurality of memories and a method of sharing a non-volatile memory. The multimedia platform in accordance with an embodiment of the present invention can have a non-volatile memory, a multimedia processor setting a route in accordance with a route selection signal received from the main processor such that the main processor accesses the non-volatile memory or the display unit, a first volatile memory which is a temporary memory device of the main processor, and a second volatile memory which is a temporary memory of the multimedia processor. With the present invention, the portable terminal can be made smaller by putting a memory chip and a multimedia platform in a single chip by use of the POP (package on package) technology.

Abstract translation: 一种包括具有多个存储器的多媒体平台和共享非易失性存储器的方法的设备。 根据本发明的实施例的多媒体平台可以具有非易失性存储器，多媒体处理器，根据从主处理器接收的路由选择信号设置路由，使得主处理器访问非易失性存储器或 显示单元，作为主处理器的临时存储器件的第一易失性存储器和作为多媒体处理器的临时存储器的第二易失性存储器。 利用本发明，通过使用POP（封装封装）技术将存储芯片和多媒体平台放入单个芯片中，可以使便携式终端更小。

公开(公告)号：US20080263429A1

公开(公告)日：2008-10-23

申请号：US12096482

申请日：2006-09-11

Applicant: Jong-Sik Jeong

Inventor： Jong-Sik Jeong

IPC: G11C29/04 ,  G06F11/07

CPC classification number: G06F11/10

Abstract: A method and a device for correcting a code data error are disclosed. A main processor included in a digital processing device in accordance with an embodiment of the present invention writes in a shared memory third code data error-corrected by a predetermined error correcting method or second code data written in a backup area if there is an error in first code data written in a code data area of a nonvolatile memory. The main processor or an application processor performs an operation corresponding to the third code data. With the present invention, a system can be stably operated thanks to promptly dealing with an error when the error in boot codes is detected or generated

Abstract translation: 公开了一种用于校正代码数据错误的方法和装置。 包括在根据本发明的实施例的数字处理装置中的主处理器在共享存储器中写入通过预定纠错方法错误校正的第三代码数据或写入备份区中的第二代码数据，如果存在错误 写入非易失性存储器的代码数据区域的第一代码数据。 主处理器或应用处理器执行与第三代码数据相对应的操作。 利用本发明，当检测或产生引导代码的错误时，由于迅速处理错误，系统可以被稳定地操作

公开(公告)号：US07212685B2

公开(公告)日：2007-05-01

申请号：US10414668

申请日：2003-04-16

Applicant: Keun-Woo Park ,  Jong-Sik Jeong ,  Kyoung-Joong Min ,  Kang-ju Kim ,  Byoung-Won Hwang ,  Won-Tae Choi

Inventor： Keun-Woo Park ,  Jong-Sik Jeong ,  Kyoung-Joong Min ,  Kang-ju Kim ,  Byoung-Won Hwang ,  Won-Tae Choi

IPC: G06K9/40 ,  G09G5/08 ,  H04B1/66

CPC classification number: G06F3/038 ,  G06F3/0317

Abstract: Disclosed herein is a method for processing image data of an optical mouse. In the method for processing image data of an optical mouse, direction and size values of motion vectors which are image data consecutively inputted from an image pixel array are filtered with respect to X and Y axes by a filter. A predetermined number of motion vectors converted by and outputted from the filter are accumulated, and the accumulated values are mapped to conversion values to attenuate noise components and amplify directionality of the motion vectors depending on a speed of the optical mouse by a mapper. The values mapped by the mapper in a plurality of pipes are stored, and a value obtained by adding the plural stored values to each other and dividing the added result value by a conversion factor is transmitted to a personal computer (PC) interface such as a Universal Serial Bus (USB) or PS/2. Accordingly, the present invention is advantageous in that it minimizes noise components of the optical mouse, and consequently ensures the unnatural movement of a cursor on a PC screen.

Abstract translation: 本文公开了一种用于处理光学鼠标的图像数据的方法。 在用于处理光学鼠标的图像数据的方法中，通过滤波器，相对于X轴和Y轴对从图像像素阵列连续输入的图像数据的运动矢量的方向和尺寸值进行滤波。 累积由滤波器转换并从滤波器输出的预定数量的运动矢量，并且累积值被映射到转换值，以衰减噪声分量并且通过映射器根据光学鼠标的速度来放大运动矢量的方向性。 存储由多个管道中的映射器映射的值，并将通过将多个存储的值彼此相加并将相加的结果值除以转换因子而获得的值被发送到个人计算机（PC）接口，例如 通用串行总线（USB）或PS / 2。 因此，本发明的优点在于，其使光学鼠标的噪声分量最小化，并且因此确保光标在PC屏幕上的不自然的移动。

公开(公告)号：US06999064B2

公开(公告)日：2006-02-14

申请号：US10413875

申请日：2003-04-15

Applicant: Keun-Woo Park ,  Jong-Sik Jeong ,  Kyoung-Joong Min ,  Kang-ju Kim ,  Byoung-Won Hwang ,  Won-Tae Choi

Inventor： Keun-Woo Park ,  Jong-Sik Jeong ,  Kyoung-Joong Min ,  Kang-ju Kim ,  Byoung-Won Hwang ,  Won-Tae Choi

IPC: G09G5/08

CPC classification number: G06F3/0317

Abstract: Disclosed herein is a single integrated circuit for an optical mouse. The circuit includes an image pixel array for recognizing light and shadow of a surface under the optical mouse, an analog-to-digital converter for receiving analog signal from the image pixel array and converting analog data into digital data, a motion vector calculation unit for converting the digital data into one-bit data and calculating a motion vector, a motion vector process unit for accumulating motion vectors, correcting errors of the motion vectors, and accumulating moving distances of the optical mouse, a timing signal generator for generating control signals to control an overall operation of the circuit and operation signals pursuant to operation states of the circuit, an interface designed to transmit values processed by the process unit into a personal computer, and a transceiver for enabling one of a universal serial bus or an IBM personal system/2 in the interface.

Abstract translation: 这里公开了用于光学鼠标的单个集成电路。 该电路包括用于识别光学鼠标下的表面的光和阴影的图像像素阵列，用于从图像像素阵列接收模拟信号并将模拟数据转换为数字数据的模拟 - 数字转换器，用于 将数字数据转换为一位数据并计算运动矢量，用于累积运动矢量的运动矢量处理单元，校正运动矢量的误差，并累积光学鼠标的移动距离;定时信号发生器，用于产生控制信号 根据电路的操作状态控制电路和操作信号的总体操作，设计用于将由处理单元处理的值传送到个人计算机的接口，以及用于实现通用串行总线或IBM个人系统之一的收发器 / 2在界面。