公开(公告)号：US4770368A

公开(公告)日：1988-09-13

申请号：US710905

申请日：1985-03-12

申请人： John S. Yates ,  Roger D. Brum

发明人： John S. Yates ,  Roger D. Brum

IPC分类号： B64D3/02

CPC分类号： B64D3/02

摘要： A turbine/air vent reeling machine for use in aerial towed target applications and the like disclosed characterized by use of a novel turbine head/air vent design which extracts ram air energy from the wind stream impinging upon a moving aircraft for the purpose of driving and braking the reeling machine for pay-in and pay-out of a towed target. Control of the turbine rotational speed is achieved through plural variable opening vents located aft of the turbine head which are driven through an open and closed orientation by a servo-motor to throttle the air mass flow through the turbine head. Turbine speed is sensed by a tachometer which is coupled to a shaft driven by the turbine. The tachometer output voltage is introduced into a closed loop control circuit including processing electronics which compares the tachometer voltage to a pre-selected set point voltage corresponding to the desired rotational speed of the turbine. The difference between the desired and actual tachometer voltage and its derivative and integral values with respect to time are mixed and amplified to drive the servo-motor to adjust the vent opening in a direction that will cause the turbine to accelerate or decelerate to a desired operational speed. The servo-motor rotation is converted to vent door movement via an actuation mechanism which ensures the vent doors will remain in a closed position in the event that power is removed from the servo-motor.

公开(公告)号：US6091897A

公开(公告)日：2000-07-18

申请号：US593588

申请日：1996-01-29

申请人： John S. Yates ,  Scott G. Robinson ,  Mark Herdeg

发明人： John S. Yates ,  Scott G. Robinson ,  Mark Herdeg

IPC分类号： G06F9/455 ,  G06F5/00

CPC分类号： G06F9/45516

摘要： A computer system for executing a binary image conversion system which converts instructions from a instruction set of a first, non native computer system to a second, different native computer system, includes an run-time system which in response to a non-native image of an application program written for a non-native instruction set provides an native instruction or a native instruction routine. The run-time system collects profile data in response to execution of the native instructions to determine execution characteristics of the non-native instruction. Thereafter, the non-native instructions and the profile statistics are fed to a binary translator operating in a background mode and which is responsive to the profile data generated by the run-time system to form a translated native image. The run-time system and the binary translator are under the control of a server process. The non-native image is executed in two different environments with first portion executed as an interpreted image and remaining portions as a translated image. The run-time system includes an interpreter which is capable of handling condition codes corresponding to the non-native architecture. A technique is also provided to jacket calls between the two execution environments and to support object based services. Preferred techniques are also provided to determine interprocedural translation units. Further, intermixed translation/optimization techniques are discussed.

摘要翻译： 一种用于执行二进制图像转换系统的计算机系统，其将来自第一非本机计算机系统的指令集的指令转换为第二不同本机计算机系统，包括运行时系统，其响应于非本地图像 为非本地指令集编写的应用程序提供本机指令或本地指令例程。 运行时系统响应于本地指令的执行而收集简档数据，以确定非本地指令的执行特性。 此后，非本地指令和简档统计信息被馈送到在后台模式下操作的二进制翻译器，并且响应于由运行时系统生成的简档数据以形成翻译的本机图像。 运行时系统和二进制翻译器都在服务器进程的控制之下。 非本地图像在两个不同的环境中执行，其中第一部分作为解释图像执行，剩余部分作为翻译图像执行。 运行时系统包括能够处理与非本地架构相对应的条件代码的解释器。 还提供了一种技术，用于在两个执行环境之间护送呼叫并支持基于对象的服务。 还提供了优选的技术来确定过程间平移单位。 此外，讨论了混合翻译/优化技术。

公开(公告)号：US4994962A

公开(公告)日：1991-02-19

申请号：US264260

申请日：1988-10-28

申请人： Paul Mageau ,  John S. Yates

发明人： Paul Mageau ,  John S. Yates

IPC分类号： G06F12/04 ,  G06F12/08

CPC分类号： G06F12/0862 ,  G06F2212/6026

摘要： A method and apparatus for selectively filling a cache memory with a variable number of data words in response to the size and type of data transfer requested by the processor associated with the cache. According to the present invention a cache fill of either 16 or 64 bytes are provided. If there is a cache miss and an 8 byte word data transfer as requested, the larger fill is provided, similarly, if the 8 byte word data transfer is not requested, the shorter block of data is provided, resulting in enhanced performance over a fixed length cache fill.

公开(公告)号：US20080216073A1

公开(公告)日：2008-09-04

申请号：US11904007

申请日：2007-09-25

申请人： John S. Yates ,  Matthew F. Storch ,  Sandeep Nijhawan ,  Dale R. Jurich ,  Korbin S. Van Dyke

发明人： John S. Yates ,  Matthew F. Storch ,  Sandeep Nijhawan ,  Dale R. Jurich ,  Korbin S. Van Dyke

IPC分类号： G06F9/46

CPC分类号： G06F9/45554 ,  G06F9/30174 ,  G06F9/30189 ,  G06F9/3861

摘要： Executing programs coded in an instruction set of a first computer on a computer of a second, different architecture. An operating system maintains an association between each one of a set of concurrent threads and a set of computer resources of the thread's context. Without modifying a pre-existing operating system of the computer, an entry exception is establishing to be raised on each entry to the operating system at a specified entry point or on a specified condition. The entry exception has an associated entry handler programmed to save a context of an interrupted thread and modify the thread context before delivering the modified context to the operating system. A resumption exception is established to be raised on each resumption from the operating system complementary to one of the specified entries. The resumption exception has an associated exit handler programmed to restore the context saved by a corresponding execution of the entry handler. The entry exception, exit exception, entry handler, and exit handler are cooperatively designed to maintain an association between a one of the threads and an extended context of the thread through a context change induced by the operating system, the extended context including resources of the computer associated with the thread beyond those resources whose association with the thread is maintained by the operating system.

摘要翻译： 在第二不同架构的计算机上执行以第一计算机的指令集编码的程序。 操作系统维护一组并发线程中的每一个与线程上下文的一组计算机资源之间的关联。 在不修改计算机的预先存在的操作系统的情况下，将在指定的入口点或指定条件下建立要在操作系统的每个条目上提出的入口异常。 条目异常具有相关联的条目处理程序，其被编程为在将修改的上下文传送到操作系统之前，保存中断的线程的上下文并修改线程上下文。 在操作系统的每次恢复之后建立恢复异常，补充指定条目之一。 恢复异常具有相关联的退出处理程序，其被编程为恢复由相应执行的条目处理程序保存的上下文。 入口异常，退出异常，条目处理程序和退出处理程序被协调地设计为通过由操作系统引发的上下文变化来维护线程中的一个线程和线程的扩展上下文之间的关联，扩展的上下文包括 与线程相关联的计算机超出与该线程的关联的那些资源由操作系统维护。

公开(公告)号：US06779107B1

公开(公告)日：2004-08-17

申请号：US09429377

申请日：1999-10-28

申请人： John S. Yates

发明人： John S. Yates

IPC分类号： G06F930

CPC分类号： G06F9/45558 ,  G06F9/45554 ,  G06F2009/45583

摘要： A microprocessor chip and methods for execution by the microprocessor chip. Instruction pipeline circuitry has first and second correct modes for processing at least some instructions. A plurality of flags each correspond to a class of instruction occurring in the instruction pipeline circuitry. Pipeline control circuitry cooperates with the instruction pipeline circuitry, as part of the basic execution cycle of the computer, to maintain the value of the flags to record failures of an attempt to execute in the first mode two mode instructions of the corresponding respective instruction classes, to be triggered by a timer expiry to switch the value of the flags, thereby to switch the instruction pipeline circuitry from one of the processing modes to the other for the corresponding instruction class. The mode switch persists for instructions consecutively executed on behalf of a program that was in execution immediately before the timer expiry, beyond any exception handlers invoked consequent to the timer expiry. As each classified instruction comes up for execution in the instruction pipeline circuitry, the instruction pipeline circuitry executes the instruction in a mode determined, at least in part, by the value of the corresponding flag.

摘要翻译： 微处理器芯片和微处理器芯片执行的方法。 指令流水线电路具有用于处理至少一些指令的第一和第二正确模式。 多个标志各自对应于在指令流水线电路中发生的一类指令。 作为计算机的基本执行周期的一部分，流水线控制电路与指令流水线电路配合，以维持标志的值以记录在第一模式中尝试执行的故障，相应的各个指令类别的两个模式指令， 由定时器到期触发以切换标志的值，从而将指令流水线电路从处理模式之一切换到相应指令类的另一个。 代表在定时器到期之前正在执行的程序连续执行的指令，除了在定时器到期之后调用的任何异常处理程序之外，模式切换仍然存在。 随着每个分类指令出现在指令流水线电路中执行，指令流水线电路以至少部分地由相应标志的值确定的模式执行指令。

公开(公告)号：US06549959B1

公开(公告)日：2003-04-15

申请号：US09434198

申请日：1999-11-04

申请人： John S. Yates ,  David L. Reese ,  Korbin S. Van Dyke

发明人： John S. Yates ,  David L. Reese ,  Korbin S. Van Dyke

IPC分类号： G06F1328

CPC分类号： G06F9/45558 ,  G06F9/45554 ,  G06F2009/45583

摘要： A method and computer for executing the method. A CPU is programmed to execute first and second processes, the first process programmed to generate a second representation in a computer memory of information of the second process stored in the memory in a first representation. A main memory divided into pages for management by a virtual memory manager that uses a table stored in the memory. DMA (direct memory access) monitoring circuitry and/or software is designed to monitor DMA memory write transactions to a main memory of a computer by a DMA device of the computer; to detect when the first representation is overwritten by a DMA memory write transaction initiated by the second process, without the second process informing the first process of the DMA memory write transaction, the detecting guaranteed to occur no later than the next access of the second representation following the DMA memory write transaction; to record an indication of a location in the main memory written by the DMA memory write transaction, the DMA monitoring circuitry designed to operate without being informed of the DMA memory write transaction by a CPU of the computer before initiation of the DMA memory write transaction, and to provide the indication to the CPU on request; and to report to the first process that the first representation is overwritten by a DMA memory write transaction. The DMA monitoring circuitry includes a plurality of registers outside the address space of the main memory, each register including an address tag and a vector of memory cells, and control circuitry designed to establish an association between a one of the plurality of registers with a region of the memory when a modification to the region is detected by setting the address tag of the one register to an approximation of the address of the region, and to set the values of the memory cells of the vector to record a fine indication of the address of a memory location modified, the control circuitry being operable without continuing supervisory control of a CPU of the computer. Circuitry is designed to record indications of modification to pages of the main memory into the registers. Read circuitry is designed to respond to a read request from the CPU by providing an address of a modified memory location. The virtual memory management tables do not provide backing store for the modification indications stored in the registers.

公开(公告)号：US06789181B1

公开(公告)日：2004-09-07

申请号：US09432753

申请日：1999-11-03

申请人： John S. Yates ,  David L. Reese ,  Korbin S. Van Dyke ,  Paul H. Hohensee

发明人： John S. Yates ,  David L. Reese ,  Korbin S. Van Dyke ,  Paul H. Hohensee

IPC分类号： G06F944

CPC分类号： G06F9/45533

摘要： A method and computer for executing the method. A source program is translated into an object program, in a manner in which the translated object program has a different execution behavior than the source program. The translated object program is executed under a monitor capable of detecting any deviation from fully-correct interpretation before any side-effect of the different execution behavior is irreversibly committed. When the monitor detects the deviation, or when an interrupt occurs during execution of the object program, a state of the program is established corresponding to a state that would have occurred during an execution of the source program, and from which execution can continue. Execution of the source program continues primarily in a hardware emulator designed to execute instructions of an instruction set non-native to the computer.

摘要翻译： 一种用于执行该方法的方法和计算机。 源程序被翻译成对象程序，其中翻译的对象程序具有与源程序不同的执行行为。 在不可执行行为的任何副作用被不可逆转地提交之前，被翻译的对象程序在能够检测到完全正确解释的任何偏离的监视器下执行。 当监视器检测到偏差时，或者在执行对象程序期间发生中断时，根据在源程序执行期间发生的状态并且从哪个执行继续可以建立程序的状态。 源程序的执行主要在硬件仿真器中进行，该硬件仿真器旨在执行非本机的指令集的指令。

公开(公告)号：US06226789B1

公开(公告)日：2001-05-01

申请号：US08593638

申请日：1996-01-29

申请人： Steven Tony Tye ,  John S. Yates

发明人： Steven Tony Tye ,  John S. Yates

IPC分类号： G06F945

CPC分类号： G06F8/52

摘要： A computer system for executing a binary image conversion system which converts instructions from a instruction set of a first, non native computer system to a second, different, native computer system, includes an run-time system which in response to a non-native image of an application program written for a non-native instruction set provides an native instruction or a native instruction routine. The run-time system collects profile data in response to execution of the native instructions to determine execution characteristics of the non-native instruction. Thereafter, the non-native instructions and the profile statistics are fed to a binary translator operating in a background mode and which is responsive to the profile data generated by the run-time system to form a translated native image. The run-time system and the binary translator are under the control of a server process. The non-native image is executed in two different enviroments with first portion executed as an interpreted image and remaining portions as a translated image. The run-time system includes an interpreter which is capable of handling condition codes corresponding to the non-native architecute. A technique is also provided to jacket calls between the two execution enviroments and to support object based services. Preferred techniques are also provide to determine interprocedural translation units. Further, intermixed translation/optimization techniques are discussed.

摘要翻译： 一种用于执行二进制图像转换系统的计算机系统，其将来自第一非本机计算机系统的指令集的指令转换为第二，不同的本地计算机系统，包括运行时系统，其响应于非本地图像 为非本地指令集编写的应用程序提供本机指令或本地指令例程。 运行时系统响应于本地指令的执行而收集简档数据，以确定非本地指令的执行特性。 此后，非本地指令和简档统计信息被馈送到在后台模式下操作的二进制翻译器，并且响应于由运行时系统生成的简档数据以形成翻译的本机图像。 运行时系统和二进制翻译器都在服务器进程的控制之下。 非原始图像在两个不同的环境中执行，第一部分被执行作为解释图像，剩余部分作为翻译图像。 运行时系统包括能够处理与非本机结构对应的条件代码的解释器。 还提供了一种技术，用于在两个执行环境之间夹紧呼叫并支持基于对象的服务。 还提供优选的技术来确定过程间平移单位。 此外，讨论了混合翻译/优化技术。

公开(公告)号：US4205848A

公开(公告)日：1980-06-03

申请号：US894924

申请日：1978-04-10

申请人： David H. Smith ,  John S. Yates ,  Paul C. Kochendorfer

发明人： David H. Smith ,  John S. Yates ,  Paul C. Kochendorfer

IPC分类号： F41J9/10 ,  B64D3/02

CPC分类号： F41J9/10

摘要： The following specification discloses an aerial gunnery target that is adapted to be towed by an aircraft at high speeds for gunnery training and aircraft weapons qualifications. The assembly comprises a multiplicity of strands or cords such as twisted and plyed polypropylene lines. Each of said strands is secured at the forward end on a towing frame having various configurations which include circles, bars, radial extensions, and other configurations, including hexagons and triangles. The towing frame is pulled by means of a conventional towing cable and may have arms that extend outwardly upon deployment by aerodynamic forces, or may be rigidly constructed in the desired shape. The elongated multiplicity of cords extend backwardly from the frame to a terminal point, such as an analogous frame or a confluence point, such as a ring, where they are attached in coupled relationship, or any other terminal means for securing the ends of the elongated cord elements. The elongated cord elements avoid the coupling of vibratory motion from one cord element to another which results in the oscillatory flapping of targets constructed of conventional fabric. The cords are provided in an array such that they do not create aerodynamic lift and fluttering when being towed. They further prevent the erratic flight that is frequently encountered in conventional rigid targets when they are damaged by gun fire. The multiplicity of elongated cord elements provide a visual surface that appears to be continuous at a distance for target purposes. It also provides a target capable of taking substantial hits without being destroyed, due to the loose configuration of the strands or cords.

摘要翻译： 以下说明书公开了一种适于由飞机以高速拖曳用于枪械训练和飞机武器资格的空中枪械目标。 该组件包括多根股线或线，例如扭曲和聚丙烯生产线。 每个所述股线在前端固定在具有各种构造的牵引框架上，所述构造包括圆形，杆状，径向延伸部以及包括六边形和三角形的其它构型。 拖曳框架通过常规的牵引电缆拉动，并且可以具有在通过空气动力部署时向外延伸的臂，或者可以刚性构​​造成所需形状。 细长的多重绳索从框架向后延伸到终点，例如类似的框架或汇合点，例如环，其中它们以联接的关系附接，或者用于固定细长的端部的任何其它端子装置 绳索元件。 细长的绳索元件避免了从一个绳索元件到另一个绳索元件的振动运动的耦合，这导致由常规织物构成的目标的振荡拍动。 电线被提供在阵列中，使得它们在被牵引时不产生空气动力学提升和振动。 它们进一步防止了传统的刚性目标在炮火被破坏时经常遇到的不规律的飞行。 细长绳索元件的多样性为目标目的提供了一段距离看起来连续的视觉表面。 它还提供了一种能够获得大量命中而不被破坏的目标，这是由于绞合线或绳索的松动构型。

公开(公告)号：US06535903B2

公开(公告)日：2003-03-18

申请号：US08593778

申请日：1996-01-29

申请人： John S. Yates ,  Steven Tony Tye

发明人： John S. Yates ,  Steven Tony Tye

IPC分类号： G06F900

CPC分类号： G06F9/455 ,  G06F9/4486

摘要： A computer system for executing a binary image conversion system which converts instructions from a instruction set of a first, non native computer system to a second, different, native computer system, includes an run-time system which in response to a non-native image of an application program written for a non-native instruction set provides an native instruction or a native instruction routine. The run-time system collects profile data in response to execution of the native instructions to determine execution characteristics of the non-native instruction. Thereafter, the non-native instructions and the profile statistics are fed to a binary translator operating in a background mode and which is responsive to the profile data generated by the run-time system to form a translated native image. The run-time system and the binary translator are under the control of a server process. The non-native image is executed in two different enviroments with first portion executed as an interpreted image and remaining portions as a translated image. The run-time system includes an interpreter which is capable of handling condition codes corresponding to the non-native architecute. A technique is also provided to jacket calls between the two execution enviroments and to support object based services. Preferred techniques are also provide to determine interprocedural translation units. Further, intermixed translation/optimization techniques are discussed.

摘要翻译： 一种用于执行二进制图像转换系统的计算机系统，其将来自第一非本机计算机系统的指令集的指令转换为第二，不同的本地计算机系统，包括运行时系统，其响应于非本地图像 为非本地指令集编写的应用程序提供本机指令或本地指令例程。 运行时系统响应于本地指令的执行而收集简档数据，以确定非本地指令的执行特性。 此后，非本地指令和简档统计信息被馈送到在后台模式下操作的二进制翻译器，并且响应于由运行时系统生成的简档数据以形成翻译的本机图像。 运行时系统和二进制翻译器都在服务器进程的控制之下。 非原始图像在两个不同的环境中执行，第一部分被执行作为解释图像，剩余部分作为翻译图像。 运行时系统包括能够处理与非本机结构对应的条件代码的解释器。 还提供了一种技术，用于在两个执行环境之间夹紧呼叫并支持基于对象的服务。 还提供优选的技术来确定过程间平移单位。 此外，讨论了混合翻译/优化技术。