-
公开(公告)号:US10140127B2
公开(公告)日:2018-11-27
申请号:US15898969
申请日:2018-02-19
发明人: Brian D. Barrick , Sundeep Chadha , Maureen A. Delaney , Thao T. Doan , Michael J. Genden , Rokesh Jayasundar , Dung Q. Nguyen , David R. Terry
摘要: Operation of a multi-slice processor including execution slices and load/store slices, where the load/store slices are coupled to the execution slices via a results bus and the results bus includes segments assigned to carry results of a different instruction type, includes: receiving a producer instruction that includes an identifier of an instruction type and an identifier of the producer instruction, including storing the identifier of the instruction type and the identifier of the producer instruction in an entry of a register; receiving a source instruction dependent upon the result of the producer instruction including storing, in an issue queue, the source instruction, the identifier of the instruction type of the producer instruction, and an identifier of the producer instruction; and snooping the identifier of the producer instruction only from the segment of the results bus assigned to carry results of the instruction type of the producer instruction.
-
公开(公告)号:US20180232230A1
公开(公告)日:2018-08-16
申请号:US15898969
申请日:2018-02-19
发明人: Brian D. Barrick , Sundeep Chadha , Maureen A. Delaney , Thao T. Doan , Michael J. Genden , Rokesh Jayasundar , Dung Q. Nguyen , David R. Terry
IPC分类号: G06F9/30 , G06F9/38 , G06F12/0831 , G06F12/0875 , G06F13/42
CPC分类号: G06F9/3851 , G06F9/3001 , G06F9/30043 , G06F9/3828 , G06F9/3836 , G06F9/384 , G06F9/3891 , G06F13/4068 , G06F13/4282
摘要: Operation of a multi-slice processor including execution slices and load/store slices, where the load/store slices are coupled to the execution slices via a results bus and the results bus includes segments assigned to carry results of a different instruction type, includes: receiving a producer instruction that includes an identifier of an instruction type and an identifier of the producer instruction, including storing the identifier of the instruction type and the identifier of the producer instruction in an entry of a register; receiving a source instruction dependent upon the result of the producer instruction including storing, in an issue queue, the source instruction, the identifier of the instruction type of the producer instruction, and an identifier of the producer instruction; and snooping the identifier of the producer instruction only from the segment of the results bus assigned to carry results of the instruction type of the producer instruction.
-
公开(公告)号:US10956158B2
公开(公告)日:2021-03-23
申请号:US16408749
申请日:2019-05-10
发明人: Steven J. Battle , Khandker N. Adeeb , Brian D. Barrick , Joshua W. Bowman , Thao T. Doan , Susan E. Eisen , Brandon Goddard , Dung Q. Nguyen
摘要: A method, processor and system for processing data is disclosed that includes evicting one or more evicted fields from a logical register mapper; receiving, by a history buffer, the one or more evicted fields from the logical register mapper; determining whether two or more of the evicted fields from the mapper qualify to be written to a single entry in the history buffer; and in response to the two or more evicted fields qualifying, writing the two or more qualifying evicted fields received from the mapper to a single entry in the qualified history buffer. The method, processor, and/or system further includes in an embodiment, remapping the one or more qualified evicted fields, and further, in response to the two or more evicted fields not qualifying to be written to a single entry in the history buffer, writing the two or more evicted fields to multiple history buffer entries.
-
公开(公告)号:US10127047B2
公开(公告)日:2018-11-13
申请号:US15898657
申请日:2018-02-18
发明人: Brian D. Barrick , Sundeep Chadha , Maureen A. Delaney , Thao T. Doan , Michael J. Genden , Rokesh Jayasundar , Dung Q. Nguyen , David R. Terry
摘要: Operation of a multi-slice processor including execution slices and load/store slices, where the load/store slices are coupled to the execution slices via a results bus and the results bus includes segments assigned to carry results of a different instruction type, includes: receiving a producer instruction that includes an identifier of an instruction type and an identifier of the producer instruction, including storing the identifier of the instruction type and the identifier of the producer instruction in an entry of a register; receiving a source instruction dependent upon the result of the producer instruction including storing, in an issue queue, the source instruction, the identifier of the instruction type of the producer instruction, and an identifier of the producer instruction; and snooping the identifier of the producer instruction only from the segment of the results bus assigned to carry results of the instruction type of the producer instruction.
-
公开(公告)号:US09952874B2
公开(公告)日:2018-04-24
申请号:US15046569
申请日:2016-02-18
发明人: Brian D. Barrick , Sundeep Chadha , Maureen A. Delaney , Thao T. Doan , Michael J. Genden , Rokesh Jayasundar , Dung Q. Nguyen , David R. Terry
CPC分类号: G06F9/3851 , G06F9/3001 , G06F9/30043 , G06F9/3844 , G06F13/4068 , G06F13/4282
摘要: Operation of a multi-slice processor including execution slices and load/store slices, where the load/store slices are coupled to the execution slices via a results bus and the results bus includes segments assigned to carry results of a different instruction type, includes: receiving a producer instruction that includes an identifier of an instruction type and an identifier of the producer instruction, including storing the identifier of the instruction type and the identifier of the producer instruction in an entry of a register; receiving a source instruction dependent upon the result of the producer instruction including storing, in an issue queue, the source instruction, the identifier of the instruction type of the producer instruction, and an identifier of the producer instruction; and snooping the identifier of the producer instruction only from the segment of the results bus assigned to carry results of the instruction type of the producer instruction.
-
公开(公告)号:US09952861B2
公开(公告)日:2018-04-24
申请号:US14969588
申请日:2015-12-15
发明人: Brian D. Barrick , Sundeep Chadha , Maureen A. Delaney , Thao T. Doan , Michael J. Genden , Rokesh Jayasundar , Dung Q. Nguyen , David R. Terry
IPC分类号: G06F9/30 , G06F9/38 , G06F12/08 , G06F13/42 , G06F12/0875 , G06F12/0831
CPC分类号: G06F9/3851 , G06F9/3001 , G06F9/30043 , G06F9/3844 , G06F13/4068 , G06F13/4282
摘要: Operation of a multi-slice processor including execution slices and load/store slices, where the load/store slices are coupled to the execution slices via a results bus and the results bus includes segments assigned to carry results of a different instruction type, includes: receiving a producer instruction that includes an identifier of an instruction type and an identifier of the producer instruction, including storing the identifier of the instruction type and the identifier of the producer instruction in an entry of a register; receiving a source instruction dependent upon the result of the producer instruction including storing, in an issue queue, the source instruction, the identifier of the instruction type of the producer instruction, and an identifier of the producer instruction; and snooping the identifier of the producer instruction only from the segment of the results bus assigned to carry results of the instruction type of the producer instruction.
-
-
-
-
-