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    Connector assembly and method
    1.
    发明授权
    Connector assembly and method 有权
    连接器组装和方法

    公开(公告)号：US09385457B2

    公开(公告)日：2016-07-05

    申请号：US14563641

    申请日：2014-12-08

    Applicant: Intel Corporation

    Inventor： Gaurav Chawla ,  Joshua D Heppner ,  Zhichao Zhang ,  David J. Llapitan ,  Vijaykumar Krithivasan

    IPC: H01R24/28 ,  H01R12/72 ,  H01R12/79 ,  H01R13/11 ,  H01R12/71 ,  H01L23/34 ,  H01R12/70

    CPC classification number: H01R12/722 ,  H01L23/34 ,  H01L2924/0002 ,  H01R12/7005 ,  H01R12/71 ,  H01R12/724 ,  H01R12/79 ,  H01R13/114 ,  H01L2924/00

    Abstract: Connectors and methods to couple packages and dies are shown. Selected examples include plugs and receptacles having two or more terraces with contacts provided along the terraces. Examples of connectors and methods include configurations where the connector is usable with a package including a die coupled along a substrate. In selected examples a heat sink is coupled over the die, and a package includes a side access port between the heat sink and the substrate configured to receive the connector, such as one or more of a plug or receptacle through the side access port.

    Abstract translation: 显示连接器和耦合封装和管芯的方法。 所选择的实例包括具有两个或更多台阶的插头和插座，其具有沿梯田提供的触点。 连接器和方法的示例包括其中连接器可用于包括沿衬底耦合的裸片的封装的配置。 在所选择的示例中，散热器耦合在管芯上，并且封装包括在散热器和被配置为接收连接器的基板之间的侧入口，例如通过侧面接入端口的一个或多个插头或插座。

    Chip socket including a circular contact pattern
    2.
    发明授权
    Chip socket including a circular contact pattern 有权
    芯片插座包括圆形触点图案

    公开(公告)号：US08961193B2

    公开(公告)日：2015-02-24

    申请号：US13712166

    申请日：2012-12-12

    Applicant: Intel Corporation

    Inventor： Gaurav Chawla ,  Vijaykumar Krithivasan ,  Joshua D Heppner

    IPC: H01R24/86

    CPC classification number: H01R43/20 ,  H01R24/86 ,  H05K7/1084 ,  Y10T29/4922

    Abstract: An apparatus for coupling an integrated circuit to other electronics can include a housing having an exterior and an interior, the exterior having an exterior bottom surface, the interior defined by an interior bottom surface opposite the exterior bottom surface, and at least one sidewall extending away from the interior bottom surface to define an interior shape that is sized to receive the integrated circuit, with the integrated circuit disposed against the interior bottom surface and the at least one sidewall. The example can include a plurality of exterior contacts exposed along the exterior bottom surface in an exterior contact pattern that is generally circular in shape.

    Abstract translation: 用于将集成电路耦合到其它电子设备的装置可以包括具有外部和内部的外壳，外部具有外部底部表面，内部由与外部底部表面相对的内部底部表面限定，并且至少一个侧壁延伸远离 从内部底部表面限定尺寸适于接收集成电路的内部形状，其中集成电路抵靠内部底部表面和至少一个侧壁设置。 该示例可以包括沿着外部底部表面暴露的多个外部接触件，外部接触图案通常为圆形形状。

    Connector assembly and method
    3.
    发明授权
    Connector assembly and method 有权
    连接器组装和方法

    公开(公告)号：US08905794B2

    公开(公告)日：2014-12-09

    申请号：US13711187

    申请日：2012-12-11

    Applicant: Intel Corporation

    Inventor： Gaurav Chawla ,  Joshua D Heppner ,  Zhichao Zhang ,  David J. Llapitan ,  Vijaykumar Krithivasan

    IPC: H01R4/66 ,  H01R12/71

    CPC classification number: H01R12/722 ,  H01L23/34 ,  H01L2924/0002 ,  H01R12/7005 ,  H01R12/71 ,  H01R12/724 ,  H01R12/79 ,  H01R13/114 ,  H01L2924/00

    Abstract: Connectors and methods to couple packages and dies are shown. Selected examples include plugs and receptacles having two or more terraces with contacts provided along the terraces. Examples of connectors and methods include configurations where the connector is usable with a package including a die coupled along a substrate. In selected examples a heat sink is coupled over the die, and a package includes a side access port between the heat sink and the substrate configured to receive the connector, such as one or more of a plug or receptacle through the side access port.

    Abstract translation: 显示连接器和耦合封装和管芯的方法。 所选择的实例包括具有两个或更多台阶的插头和插座，其具有沿梯田提供的触点。 连接器和方法的示例包括其中连接器可用于包括沿衬底耦合的裸片的封装的配置。 在所选择的示例中，散热器耦合在管芯上，并且封装包括在散热器和被配置为接收连接器的基板之间的侧入口，例如通过侧面接入端口的一个或多个插头或插座。

    TECHNIQUES AND CONFIGURATIONS ASSOCIATED WITH A PACKAGE LOAD ASSEMBLY
    4.
    发明申请
    TECHNIQUES AND CONFIGURATIONS ASSOCIATED WITH A PACKAGE LOAD ASSEMBLY 有权
    与包装装配相关的技术和配置

    公开(公告)号：US20160079150A1

    公开(公告)日：2016-03-17

    申请号：US14484896

    申请日：2014-09-12

    Applicant: Intel Corporation

    Inventor： Gaurav Chawla ,  Joshua D. Heppner ,  Vijaykumar Krithivasan ,  Michael Garcia ,  Kuang C. Liu ,  Rajasekaran Swaminathan

    IPC: H01L23/498 ,  H01L23/36 ,  H01L21/48 ,  B23P15/26

    CPC classification number: H05K7/20 ,  H01L23/3675 ,  H01L23/4006 ,  H01L23/433 ,  H01L2224/16225 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/00

    Abstract: Embodiments of the present disclosure are directed toward techniques and configurations associated with a package load assembly. In one embodiment, a package load assembly may include a frame configured to form a perimeter around a die area of a package substrate having a first surface configured to be coupled with a surface of the package substrate and a second surface disposed opposite to the first surface. The frame may include deformable members disposed on the second surface, which may be configured to be coupled with a base of a heat sink to distribute force applied between the heat sink and the package substrate, via the frame, and may deform under application of the force, which may allow the base of the heat sink to contact a surface of an integrated heat spreader within the die area of the package substrate.

    Abstract translation: 本公开的实施例涉及与封装负载组件相关联的技术和配置。 在一个实施例中，包装负载组件可以包括框架，该框架被配置为围绕包装衬底的管芯区域形成周边，该封装衬底具有构造成与封装衬底的表面耦合的第一表面和与第一表面相对设置的第二表面 。 框架可以包括设置在第二表面上的可变形构件，其可以被配置为与散热器的底座相耦合，以经由框架分布施加在散热器和封装衬底之间的力，并且可以在应用 力，其可以允许散热器的底部接触在封装衬底的管芯区域内的集成散热器的表面。

    Multi-array bottom-side connector using spring bias
    6.
    发明授权
    Multi-array bottom-side connector using spring bias 有权
    使用弹簧偏置的多阵列底侧连接器

    公开(公告)号：US09490560B2

    公开(公告)日：2016-11-08

    申请号：US14576735

    申请日：2014-12-19

    Applicant: INTEL CORPORATION

    Inventor： Gaurav Chawla ,  David J. Llapitan ,  Jeffory L. Smalley ,  Tejinder Pal Aulakh ,  Vijaykumar Krithivasan ,  Donald T. Tran

    IPC: H01R12/79 ,  H05K7/10 ,  H01R43/20 ,  G06F1/18

    CPC classification number: H01R12/79 ,  G06F1/18 ,  H01R43/205 ,  H05K7/1069 ,  H05K7/1092

    Abstract: A connector for a multi-array bottom side array is described that uses a spring bias. In one example, a connector includes a connector housing, the connector housing having a bottom surface, and a plurality of resilient connectors opposite the bottom surface to electrically connect to a corresponding plurality of pads of an integrated circuit package, a cable connector to electrically connect the resilient connectors to a cable, a base plate having a bottom surface to press against a circuit board, and a top surface opposite the bottom surface, and plurality of spring members coupled between the base plate and the connector bottom surface to press the base plate bottom surface against the system board and to press the connector housing connectors against the package.

    Abstract translation: 描述了使用弹簧偏压的多阵列底侧阵列的连接器。 在一个示例中，连接器包括连接器壳体，连接器壳体具有底表面，以及与底表面相对的多个弹性连接器，以电连接到集成电路封装的对应的多个焊盘;电缆连接器，用于电连接 电缆的弹性连接器，具有压靠电路板的底表面的基板和与底表面相对的顶表面，以及联接在基板和连接器底表面之间的多个弹簧构件，用于将基板 底部表面靠在系统板上，并将连接器外壳连接件按压在包装上。

    MULTI-ARRAY BOTTOM-SIDE CONNECTOR USING SPRING BIAS
    7.
    发明申请
    MULTI-ARRAY BOTTOM-SIDE CONNECTOR USING SPRING BIAS 有权
    使用弹簧偏移的多阵列底端连接器

    公开(公告)号：US20160181714A1

    公开(公告)日：2016-06-23

    申请号：US14576735

    申请日：2014-12-19

    Applicant: INTEL CORPORATION

    Inventor： GAURAV CHAWLA ,  David J. Llapitan ,  Jeffory L. Smalley ,  Tejinder Pal Aulakh ,  Vijaykumar Krithivasan ,  Donald T. Tran

    IPC: H01R12/79 ,  H05K7/10 ,  G06F1/18 ,  H01R43/20

    CPC classification number: H01R12/79 ,  G06F1/18 ,  H01R43/205 ,  H05K7/1069 ,  H05K7/1092

    Abstract: A connector for a multi-array bottom side array is described that uses a spring bias. In one example, a connector includes a connector housing, the connector housing having a bottom surface, and a plurality of resilient connectors opposite the bottom surface to electrically connect to a corresponding plurality of pads of an integrated circuit package, a cable connector to electrically connect the resilient connectors to a cable, a base plate having a bottom surface to press against a circuit board, and a top surface opposite the bottom surface, and plurality of spring members coupled between the base plate and the connector bottom surface to press the base plate bottom surface against the system board and to press the connector housing connectors against the package.

    Abstract translation: 描述了使用弹簧偏压的多阵列底侧阵列的连接器。 在一个示例中，连接器包括连接器壳体，连接器壳体具有底表面，以及与底表面相对的多个弹性连接器，以电连接到集成电路封装的对应的多个焊盘;电缆连接器，用于电连接 电缆的弹性连接器，具有压靠电路板的底表面的基板和与底表面相对的顶表面，以及联接在基板和连接器底表面之间的多个弹簧构件，用于将基板 底部表面靠在系统板上，并将连接器外壳连接件按压在包装上。

    CONNECTOR ASSEMBLY AND METHOD
    8.
    发明申请
    CONNECTOR ASSEMBLY AND METHOD 审中-公开
    连接器总成和方法

    公开(公告)号：US20150249298A1

    公开(公告)日：2015-09-03

    申请号：US14563641

    申请日：2014-12-08

    Applicant: Intel Corporation

    Inventor： Gaurav Chawla ,  Joshua D. Heppner ,  Zhichao Zhang ,  David J. Llapitan ,  Vijaykumar Krithivasan

    IPC: H01R12/72 ,  H01R12/70 ,  H01L23/34 ,  H01R13/11

    CPC classification number: H01R12/722 ,  H01L23/34 ,  H01L2924/0002 ,  H01R12/7005 ,  H01R12/71 ,  H01R12/724 ,  H01R12/79 ,  H01R13/114 ,  H01L2924/00

    Abstract: Connectors and methods to couple packages and dies are shown. Selected examples include plugs and receptacles having two or more terraces with contacts provided along the terraces. Examples of connectors and methods include configurations where the connector is usable with a package including a die coupled along a substrate. In selected examples a heat sink is coupled over the die, and a package includes a side access port between the heat sink and the substrate configured to receive the connector, such as one or more of a plug or receptacle through the side access port.

    Abstract translation: 显示连接器和耦合封装和管芯的方法。 所选择的示例包括具有两个或更多台阶的插头和插座，其具有沿着梯田提供的触点。 连接器和方法的示例包括其中连接器可用于包括沿衬底耦合的裸片的封装的配置。 在所选择的示例中，散热器耦合在管芯上，并且封装包括在散热器和被配置为接收连接器的基板之间的侧入口，例如通过侧面接入端口的一个或多个插头或插座。

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