公开(公告)号：US20160266941A1

公开(公告)日：2016-09-15

申请号：US15162709

申请日：2016-05-24

Applicant: Intel Corporation

Inventor： Krishnakanth V. Sistla ,  Mark Rowland ,  Ankush Varma ,  Ian M. Steiner ,  Matthew Bace ,  Daniel Borkowski ,  Vivek Garg ,  Cagdas Akturan ,  Avinash N. Ananthakrishnan

IPC: G06F9/50 ,  G06F1/32

CPC classification number: G06F9/5094 ,  G06F1/3206 ,  G06F1/3228 ,  G06F1/3234 ,  G06F1/324 ,  G06F1/3287 ,  Y02D10/126 ,  Y02D10/171

Abstract: In one embodiment, the present invention includes a multicore processor having a power controller with logic to dynamically switch a power management policy from a power biased policy to a performance biased policy when a utilization of the processor exceeds a threshold level. Thus at low utilizations, reduced power consumption can be realized, while at higher utilizations, greater performance can be realized. Other embodiments are described and claimed.

Abstract translation: 在一个实施例中，本发明包括具有功率控制器的多核处理器，所述功率控制器具有在处理器的利用率超过阈值水平时将功率管理策略从功率偏置策略动态切换到性能偏差策略的逻辑。 因此，在低利用率下，可以实现降低的功率消耗，而在更高的利用率下，可以实现更高的性能。 描述和要求保护其他实施例。

公开(公告)号：US20160004291A1

公开(公告)日：2016-01-07

申请号：US14855553

申请日：2015-09-16

Applicant: Intel Corporation

Inventor： Krishnakanth V. Sistla ,  Jeremy Shrall ,  Stephen H. Gunther ,  Efraim Rotem ,  Alon Naveh ,  Eliezer Weissmann ,  Anil Aggarwal ,  Martin T. Rowland ,  Ankush Varma ,  Ian M. Steiner ,  Matthew Bace ,  Avinash N. Ananthakrishnan ,  Jason Brandt

IPC: G06F1/32

CPC classification number: G06F1/3275 ,  G06F1/266 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/3234

Abstract: In one embodiment, the present invention includes a processor having a core and a power controller to control power management features of the processor. The power controller can receive an energy performance bias (EPB) value from the core and access a power-performance tuning table based on the value. Using information from the table, at least one setting of a power management feature can be updated. Other embodiments are described and claimed.

公开(公告)号：US09377841B2

公开(公告)日：2016-06-28

申请号：US13889785

申请日：2013-05-08

Applicant: Intel Corporation

Inventor： Ankush Varma ,  Ian Steiner ,  Avinash Ananthakrishnan ,  Krishnakanth Sistla ,  Chris Poirier ,  Matthew Bace ,  Eric Dehaemer

IPC: G06F1/32

CPC classification number: G06F1/324 ,  G06F1/3206 ,  Y02D10/126

Abstract: In an embodiment, a processor includes a plurality of cores each to independently execute instructions, and a power control unit coupled to the plurality of cores to control power consumption of the processor, where the power control unit includes a control logic to reduce a maximum operating frequency of the processor if a first number of forced performance state transitions occurs in a first time period or a second number of forced performance state transitions occurs in a second time period. Other embodiments are described and claimed.

Abstract translation: 在一个实施例中，处理器包括各自独立地执行指令的多个核心以及耦合到多个核心的功率控制单元以控制处理器的功率消耗，其中功率控制单元包括控制逻辑以减少最大操作 如果在第一时间段内发生第一数量的强制执行状态转换或在第二时间段内发生第二数量的强制执行状态转换，则处理器的频率。 描述和要求保护其他实施例。

公开(公告)号：US10372197B2

公开(公告)日：2019-08-06

申请号：US15367330

申请日：2016-12-02

Applicant: Intel Corporation

Inventor： Krishnakanth V. Sistla ,  Jeremy Shrall ,  Stephen H. Gunther ,  Efraim Rotem ,  Alon Naveh ,  Eliezer Weissmann ,  Anil Aggarwal ,  Martin T. Rowland ,  Ankush Varma ,  Ian M. Steiner ,  Matthew Bace ,  Avinash N. Ananthakrishnan ,  Jason Brandt

IPC: G06F1/26 ,  G06F1/3234 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/32

Abstract: In one embodiment, the present invention includes a processor having a core and a power controller to control power management features of the processor. The power controller can receive an energy performance bias (EPB) value from the core and access a power-performance tuning table based on the value. Using information from the table, at least one setting of a power management feature can be updated. Other embodiments are described and claimed.

公开(公告)号：US09170624B2

公开(公告)日：2015-10-27

申请号：US13782473

申请日：2013-03-01

Applicant: Intel Corporation

Inventor： Krishnakanth V. Sistla ,  Jeremy Shrall ,  Stephen H. Gunther ,  Efraim Rotem ,  Alon Naveh ,  Eliezer Weissmann ,  Anil Aggarwal ,  Martin T. Rowland ,  Ankush Varma ,  Ian M. Steiner ,  Matthew Bace ,  Avinash N. Ananthakrishnan ,  Jason Brandt

IPC: G06F1/26 ,  G06F1/32

CPC classification number: G06F1/3275 ,  G06F1/266 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/3234

Abstract: In one embodiment, the present invention includes a processor having a core and a power controller to control power management features of the processor. The power controller can receive an energy performance bias (EPB) value from the core and access a power-performance tuning table based on the value. Using information from the table, at least one setting of a power management feature can be updated. Other embodiments are described and claimed.

公开(公告)号：US09760409B2

公开(公告)日：2017-09-12

申请号：US15162709

申请日：2016-05-24

Applicant: Intel Corporation

Inventor： Krishnakanth V. Sistla ,  Mark Rowland ,  Ankush Varma ,  Ian M. Steiner ,  Matthew Bace ,  Daniel Borkowski ,  Vivek Garg ,  Chelsea Akturan ,  Avinash N. Ananthakrishnan

IPC: G06F1/32 ,  G06F9/50

CPC classification number: G06F9/5094 ,  G06F1/3206 ,  G06F1/3228 ,  G06F1/3234 ,  G06F1/324 ,  G06F1/3287 ,  Y02D10/126 ,  Y02D10/171

Abstract: In one embodiment, the present invention includes a multicore processor having a power controller with logic to dynamically switch a power management policy from a power biased policy to a performance biased policy when a utilization of the processor exceeds a threshold level. Thus at low utilizations, reduced power consumption can be realized, while at higher utilizations, greater performance can be realized. Other embodiments are described and claimed.

公开(公告)号：US20170083076A1

公开(公告)日：2017-03-23

申请号：US15367330

申请日：2016-12-02

Applicant: Intel Corporation

Inventor： Krishnakanth V. Sistla ,  Jeremy Shrall ,  Stephen H. Gunther ,  Efraim Rotem ,  Alon Naveh ,  Eliezer Weissmann ,  Anil Aggarwal ,  Martin T. Rowland ,  Ankush Varma ,  Ian M. Steiner ,  Matthew Bace ,  Avinash N. Ananthakrishnan ,  Jason Brandt

IPC: G06F1/32 ,  G06F1/26

CPC classification number: G06F1/3275 ,  G06F1/266 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/3234

Abstract: In one embodiment, the present invention includes a processor having a core and a power controller to control power management features of the processor. The power controller can receive an energy performance bias (EPB) value from the core and access a power-performance tuning table based on the value. Using information from the table, at least one setting of a power management feature can be updated. Other embodiments are described and claimed.

公开(公告)号：US09535487B2

公开(公告)日：2017-01-03

申请号：US14855553

申请日：2015-09-16

Applicant: Intel Corporation

Inventor： Krishnakanth V. Sistla ,  Jeremy Shrall ,  Stephen H. Gunther ,  Efraim Rotem ,  Alon Naveh ,  Eliezer Weissmann ,  Anil Aggarwal ,  Martin T. Rowland ,  Ankush Varma ,  Ian M. Steiner ,  Matthew Bace ,  Avinash N. Ananthakrishnan ,  Jason Brandt

IPC: G06F1/26 ,  G06F1/32

CPC classification number: G06F1/3275 ,  G06F1/266 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/3234

Abstract: In one embodiment, the present invention includes a processor having a core and a power controller to control power management features of the processor. The power controller can receive an energy performance bias (EPB) value from the core and access a power-performance tuning table based on the value. Using information from the table, at least one setting of a power management feature can be updated. Other embodiments are described and claimed.

Abstract translation: 在一个实施例中，本发明包括具有核心的处理器和用于控制处理器的电源管理特征的功率控制器。 功率控制器可以从核心接收能量性能偏差（EPB）值，并根据该值访问功率性能调谐表。 使用表中的信息，可以更新电源管理功能的至少一个设置。 描述和要求保护其他实施例。