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1.发明申请公开(公告)号：US20180148322A1
公开(公告)日：2018-05-31
申请号：US15692938
申请日：2017-08-31
Applicant: Infineon Technologies AG
Inventor： Dominic Maier , Matthias Steiert , Chau Fatt Chiang , Christian Geissler , Bernd Goller , Thomas Kilger , Johannes Lodermeyer , Franz-Xaver Muehlbauer , Chee Yang Ng , Beng Keh See , Claus Waechter
Abstract: A semiconductor package includes a semiconductor die having a sensor structure disposed at a first side of the semiconductor die, and a first port extending through the semiconductor die from the first side to a second side of the semiconductor die opposite the first side, so as to provide a link to the outside environment. Corresponding methods of manufacture are also provided.
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公开(公告)号：US11505450B2
公开(公告)日：2022-11-22
申请号：US17076250
申请日：2020-10-21
Applicant: Infineon Technologies AG
Inventor： Florian Brandl , Christian Geissler , Robert Gruenberger , Claus Waechter , Bernhard Winkler
Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate having a first surface and a second surface arranged opposite to the first surface; a stress-sensitive sensor disposed at the first surface of the substrate, where the stress-sensitive sensor is sensitive to mechanical stress; a stress-decoupling trench that has a vertical extension that extends from the first surface into the substrate, where the stress-decoupling trench vertically extends partially into the substrate towards the second surface although not completely to the second surface; and a plurality of particle filter trenches that vertically extend from the second surface into the substrate, wherein each of the plurality of particle filter trenches have a longitudinal extension that extends orthogonal to the vertical extension of the stress-decoupling trench.
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公开(公告)号：US20220148951A1
公开(公告)日：2022-05-12
申请号：US17544221
申请日：2021-12-07
Applicant: Infineon Technologies AG
Inventor： Ngoc-Hoa Huynh , Franz-Xaver Muehlbauer , Claus Waechter , Veronika Theyerl , Dominic Maier , Thomas Kilger , Saverio Trotta , Ashutosh Baheti , Georg Meyer-Berg , Maciej Wojnowski
IPC: H01L23/498 , H01L23/367 , H01L23/538 , H01Q9/28 , H01Q1/22 , H01Q9/04 , H01Q21/06 , H01L21/56 , H01L23/31
Abstract: A semiconductor device includes a semiconductor chip and a redistribution layer on a first side of the semiconductor chip. The redistribution layer is electrically coupled to the semiconductor chip. The semiconductor device includes a dielectric layer and an antenna on the dielectric layer. The dielectric layer is between the antenna and the semiconductor chip.
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公开(公告)号：US11251146B2
公开(公告)日：2022-02-15
申请号：US16841298
申请日：2020-04-06
Applicant: Infineon Technologies AG
Inventor： Walter Hartner , Francesca Arcioni , Birgit Hebler , Martin Richard Niessner , Claus Waechter , Maciej Wojnowski
IPC: H01L21/00 , H01L23/00 , H01L23/522
Abstract: A semiconductor device comprises a semiconductor chip having a radio-frequency circuit and a radio-frequency terminal, an external radio-frequency terminal, and a non-galvanic connection arranged between the radio-frequency terminal of the semiconductor chip and the external radio-frequency terminal, wherein the non-galvanic connection is designed to transmit a radio-frequency signal.
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公开(公告)号：US20200039820A1
公开(公告)日：2020-02-06
申请号：US16595532
申请日：2019-10-08
Applicant: Infineon Technologies AG
Inventor： Claus Waechter , Edward Fuergut , Bernd Goller , Michael Ledutke , Dominic Maier
Abstract: The method comprises fabricating a semiconductor panel comprising a plurality of semiconductor devices, fabricating a cap panel comprising a plurality of caps, bonding the cap panel onto the semiconductor panel so that each one of the caps covers one or more of the semiconductor devices, and singulating the bonded panels into a plurality of semiconductor modules.
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Patent Agency Ranking
公开(公告)号：US10549985B2
公开(公告)日：2020-02-04
申请号：US15692938
申请日：2017-08-31
Applicant: Infineon Technologies AG
Inventor： Dominic Maier , Matthias Steiert , Chau Fatt Chiang , Christian Geissler , Bernd Goller , Thomas Kilger , Johannes Lodermeyer , Franz-Xaver Muehlbauer , Chee Yang Ng , Beng Keh See , Claus Waechter
Abstract: A semiconductor package includes a semiconductor die having a sensor structure disposed at a first side of the semiconductor die, and a first port extending through the semiconductor die from the first side to a second side of the semiconductor die opposite the first side, so as to provide a link to the outside environment. Corresponding methods of manufacture are also provided.
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公开(公告)号：US10435292B2
公开(公告)日：2019-10-08
申请号：US15651522
申请日：2017-07-17
Applicant: Infineon Technologies AG
Inventor： Claus Waechter , Edward Fuergut , Bernd Goller , Michael Ledutke , Dominic Maier
Abstract: The method comprises fabricating a semiconductor panel comprising a plurality of semiconductor devices, fabricating a cap panel comprising a plurality of caps, bonding the cap panel onto the semiconductor panel so that each one of the caps covers one or more of the semiconductor devices, and singulating the bonded panels into a plurality of semiconductor modules.
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公开(公告)号：US20230197577A1
公开(公告)日：2023-06-22
申请号：US18082238
申请日：2022-12-15
Applicant: Infineon Technologies AG
Inventor： Thorsten Scharf , Josef Höglauer , Angela Kessler , Claus Waechter
IPC: H01L23/495 , H01L23/31 , H01L25/16 , H01L25/00
CPC classification number: H01L23/49541 , H01L23/3107 , H01L23/49534 , H01L25/16 , H01L25/50
Abstract: A semiconductor device includes a premolded leadframe, including a main surface, at least one electrical contact extending out of the main surface, and an opposite main surface arranged opposite to the main surface. The semiconductor device further includes a semiconductor package arranged on the main surface and laterally displaced to the at least one electrical contact of the premolded leadframe. The semiconductor package includes a semiconductor chip and at least one electrical contact. Surfaces of the at least one electrical contact of the premolded leadframe and the at least one electrical contact of the semiconductor package facing away from the main surface are flush.
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公开(公告)号：US10899604B2
公开(公告)日：2021-01-26
申请号：US16387918
申请日：2019-04-18
Applicant: Infineon Technologies AG
Inventor： Florian Brandl , Christian Geissler , Robert Gruenberger , Claus Waechter , Bernhard Winkler
Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate having a first surface and a second surface arranged opposite to the first surface; a stress-sensitive sensor disposed at the first surface of the substrate, where the stress-sensitive sensor is sensitive to mechanical stress; a stress-decoupling trench that has a vertical extension that extends from the first surface into the substrate, where the stress-decoupling trench vertically extends partially into the substrate towards the second surface although not completely to the second surface; and a plurality of particle filter trenches that vertically extend from the second surface into the substrate, wherein each of the plurality of particle filter trenches have a longitudinal extension that extends orthogonal to the vertical extension of the stress-decoupling trench.
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10.发明申请公开(公告)号：US20200006174A1
公开(公告)日：2020-01-02
申请号：US16447610
申请日：2019-06-20
Applicant: Infineon Technologies AG
Inventor： Christian GEISSLER , Walter Hartner , Claus Waechter , Maciej Wojnowski
Abstract: A method comprises providing a least one semiconductor component, wherein each of the at least one semiconductor component comprises: a semiconductor chip, wherein the semiconductor chip comprises a first main surface and a second main surface opposite the first main surface, and a sacrificial layer arranged above the opposite second main surface of the semiconductor chip. The method further comprises encapsulating the at least one semiconductor component with an encapsulation material. The method further comprises removing the sacrificial material, wherein above each of the at least one semiconductor chip a cutout is formed in the encapsulation material. The method further comprises arranging at least one lid above the at least one cutout, wherein a closed cavity is formed by the at least one cutout and the at least one lid above each of the at least one semiconductor chip.
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