公开(公告)号：US20190293838A1

公开(公告)日：2019-09-26

申请号：US16176191

申请日：2018-10-31

Applicant: Invensas Bonding Technologies, Inc.

Inventor： Belgacem HABA ,  Rajesh KATKAR ,  Ilyas MOHAMMED

IPC: G02B1/10 ,  G02B1/02 ,  G02B27/01

Abstract: Direct-bonded lamination for improved image clarity in optical devices is provided. An example process planarizes and plasma-activates optical surfaces to be laminated together, then forms direct bonds between the two surfaces without an adhesive or adhesive layer. This process provides improved optics with higher image brightness, less light scattering, better resolution, and higher image fidelity. The direct bonds also provide a refractory interface tolerant of much higher temperatures than conventional optical adhesives. The example process can be used to produce many types of improved optical components, such as improved laminated lenses, mirrors, beam splitters, collimators, prism systems, optical conduits, and mirrored waveguides for smartglasses and head-up displays (HUDs), which provide better image quality and elimination of the dark visual lines that are apparent to a human viewer when conventional adhesives are used in conventional lamination.

公开(公告)号：US20220155490A1

公开(公告)日：2022-05-19

申请号：US17587921

申请日：2022-01-28

Applicant: INVENSAS BONDING TECHNOLOGIES, INC.

Inventor： Belgacem Haba ,  Rajesh Katkar ,  Ilyas MOHAMMED

IPC: G02B1/10 ,  G02B1/02 ,  G02B27/01

Abstract: Direct-bonded lamination for improved image clarity in optical devices is provided. An example process planarizes and plasma-activates optical surfaces to be laminated together, then forms direct bonds between the two surfaces without an adhesive or adhesive layer. This process provides improved optics with higher image brightness, less light scattering, better resolution, and higher image fidelity. The direct bonds also provide a refractory interface tolerant of much higher temperatures than conventional optical adhesives. The example process can be used to produce many types of improved optical components, such as improved laminated lenses, mirrors, beam splitters, collimators, prism systems, optical conduits, and mirrored waveguides for smartglasses and head-up displays (HUDs), which provide better image quality and elimination of the dark visual lines that are apparent to a human viewer when conventional adhesives are used in conventional lamination.

公开(公告)号：US20200075534A1

公开(公告)日：2020-03-05

申请号：US16218769

申请日：2018-12-13

Applicant: Invensas Bonding Technologies, Inc.

Inventor： Guilian GAO ,  Gaius Gillman FOUNTAIN, JR. ,  Laura Wills MIRKARIMI ,  Rajesh KATKAR ,  Ilyas MOHAMMED ,  Cyprian Emeka UZOH

IPC: H01L23/00 ,  H01L23/522 ,  H01L21/768

Abstract: Layer structures for making direct metal-to-metal bonds at low temperatures and shorter annealing durations in microelectronics are provided. Example bonding interface structures enable direct metal-to-metal bonding of interconnects at low annealing temperatures of 150° C. or below, and at a lower energy budget. The example structures provide a precise metal recess distance for conductive pads and vias being bonded that can be achieved in high volume manufacturing. The example structures provide a vertical stack of conductive layers under the bonding interface, with geometries and thermal expansion features designed to vertically expand the stack at lower temperatures over the precise recess distance to make the direct metal-to-metal bonds. Further enhancements, such as surface nanotexture and copper crystal plane selection, can further actuate the direct metal-to-metal bonding at lowered annealing temperatures and shorter annealing durations.

公开(公告)号：US20180331000A1

公开(公告)日：2018-11-15

申请号：US15837941

申请日：2017-12-11

Applicant: Invensas Bonding Technologies, Inc.

Inventor： Javier A. DELACRUZ ,  Paul M. ENQUIST ,  Gaius Gillman FOUNTAIN, JR. ,  Ilyas MOHAMMED

IPC: H01L21/66 ,  H01L23/00

Abstract: Representative implementations of devices and techniques provide a temporary access point (e.g., for testing, programming, etc.) for a targeted interconnect located among multiple finely spaced interconnects on a surface of a microelectronic component. One or more sacrificial layers are disposed on the surface of the microelectronic component, overlaying the multiple interconnects. An insulating layer is disposed between a conductive layer and the surface, and includes a conductive via through the insulating layer that electrically couples the conductive layer to the target interconnect. The sacrificial layers are configured to be removed after the target interconnect has been accessed, without damaging the surface of the microelectronic component.

公开(公告)号：US20180273377A1

公开(公告)日：2018-09-27

申请号：US15920759

申请日：2018-03-14

Applicant: Invensas Bonding Technologies, Inc.

Inventor： Rajesh KATKAR ,  Liang WANG ,  Cyprian Emeka UZOH ,  Shaowu HUANG ,  Guilian GAO ,  Ilyas MOHAMMED

IPC: B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00333 ,  B81B7/0032 ,  B81B7/0074 ,  B81C1/00261 ,  B81C1/00269 ,  B81C2203/038 ,  H01L23/02 ,  H01L23/04 ,  H01L23/053 ,  H01L23/10

Abstract: Representative implementations of techniques and devices provide seals for sealing the joints of bonded microelectronic devices as well as bonded and sealed microelectronic assemblies. Seals are disposed at joined surfaces of stacked dies and wafers to seal the joined surfaces. The seals may be disposed at an exterior periphery of the bonded microelectronic devices or disposed within the periphery using the various techniques.

公开(公告)号：US20200105630A1

公开(公告)日：2020-04-02

申请号：US16701606

申请日：2019-12-03

Applicant: Invensas Bonding Technologies, Inc.

Inventor： Javier A. DELACRUZ ,  Paul M. ENQUIST ,  Gaius Gillman FOUNTAIN, JR. ,  Ilyas MOHAMMED

IPC: H01L21/66 ,  H01L23/00

Abstract: Representative implementations of devices and techniques provide a temporary access point (e.g., for testing, programming, etc.) for a targeted interconnect located among multiple finely spaced interconnects on a surface of a microelectronic component. One or more sacrificial layers are disposed on the surface of the microelectronic component, overlaying the multiple interconnects. An insulating layer is disposed between a conductive layer and the surface, and includes a conductive via through the insulating layer that electrically couples the conductive layer to the target interconnect. The sacrificial layers are configured to be removed after the target interconnect has been accessed, without damaging the surface of the microelectronic component.