公开(公告)号：US20030047807A1

公开(公告)日：2003-03-13

申请号：US09947098

申请日：2001-09-05

Applicant: International Business Machines Corporation

Inventor： David J. Alcoe ,  Li Li ,  Sanjeev B. Sathe

IPC: H01L023/48 ,  H01L023/52 ,  H01L029/40

CPC classification number: H01L23/562 ,  H01L23/3735 ,  H01L2224/16 ,  H01L2924/01025 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/3511 ,  H05K1/0203 ,  H05K1/0271 ,  H05K1/112 ,  H05K3/4602 ,  H05K2201/09781 ,  H05K2201/10674 ,  H05K2201/2009

Abstract: An electronic package and method of making same in which a circuitized substrate having a first stiffness includes a plurality of electrically conductive circuit members on a first portion of the circuitized substrate and is adapted for having solder connections thereon and for being electrically connected to a semiconductor chip. A stiffener layer having a second stiffness is positioned on a second portion of the circuitized substrate relative to the first portion, the second stiffness of the stiffener layer distributing a portion of the first stiffness of said circuitized substrate so as to substantially prevent failure of the solder connections between the electrically conductive circuit members and the semiconductor chip during operation of the electronic package.

Abstract translation: 一种电子封装及其制造方法，其中具有第一刚度的电路化衬底包括在电路化衬底的第一部分上的多个导电电路构件，并且适于在其上具有焊接连接并且用于电连接到半导体芯片 。 具有第二刚度的加强层相对于第一部分位于电路化基板的第二部分上，加强层的第二刚度分布所述电路化基板的第一刚度的一部分，以便基本上防止焊料的故障 在电子封装的操作期间导电电路部件与半导体芯片之间的连接。

公开(公告)号：US20020096746A1

公开(公告)日：2002-07-25

申请号：US10037536

申请日：2002-01-04

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： David N. Cokely ,  Thomas M. Culnane ,  Lisa J. Jimarez ,  Miguel A. Jimarez ,  Li Li ,  Donald I. Mead

IPC: H01L023/495

CPC classification number: H01L24/81 ,  H01L21/6835 ,  H01L24/75 ,  H01L2224/75 ,  H01L2224/75755 ,  H01L2224/7598 ,  H01L2224/75983 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/014

Abstract: Fixtures for attaching a semiconductor chip to a substrate. The semiconductor chip has an array of joining material bumps, such as C4 solder balls. The substrate has an array of conductive pads corresponding to the array of joining material bumps. In a first embodiment the fixture has a body having a first cavity for containing the semiconductor chip and a second cavity in communication with the first cavity for containing the substrate. Whereby the substrate is placed over the semiconductor chip with the conductive pads opposing and in contact with the joining material bumps, such that during reflow of the joining material bumps, the weight of the substrate acts against the joining material bumps and aids in the attachment of the semiconductor chip to the substrate to form electrical connections therebetween. In a second embodiment the fixture has a first plate having a first opening for disposal of the semiconductor chip therein, a second plate stacked below the first plate and having a thickness substantially equal to the thickness of the substrate, the second plate further having a second opening opposing the first opening for disposal of the substrate therein, and a third plate stacked below the second plate such that the substrate is flattened in the second opening under the weight of the first plate thereby aiding in the attachment of the joining material bumps to their corresponding conductive pads during solder reflow to form electrical connections therebetween. Methods for use of the fixtures is also provided.

Abstract translation: 用于将半导体芯片附接到基板的夹具。 半导体芯片具有连接材料凸块的阵列，例如C4焊球。 衬底具有对应于接合材料凸块阵列的导电焊盘阵列。 在第一实施例中，固定装置具有主体，该主体具有用于容纳半导体芯片的第一空腔和与第一空腔连通以容纳基板的第二空腔。 由此将衬底放置在半导体芯片上，其中导电焊盘与接合材料凸块相对并接触，使得在接合材料凸块的回流期间，衬底的重量抵抗接合材料凸起并且有助于附接 半导体芯片到基板以在它们之间形成电连接。 在第二实施例中，固定装置具有第一板，其具有用于在其中处理半导体芯片的第一开口，堆叠在第一板下方并且具有基本上等于衬底厚度的厚度的第二板，第二板还具有第二板 与第一开口相对地打开以处理其中的基板;以及第三板，堆叠在第二板下方，使得基板在第一板的重量下在第二开口中变平，由此辅助将接合材料凸块附接到它们 焊料回流期间相应的导电焊盘在其间形成电连接。 还提供了使用固定装置的方法。

公开(公告)号：US20040012086A1

公开(公告)日：2004-01-22

申请号：US10197335

申请日：2002-07-17

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： William Infantolino ,  Li Li ,  Steven G. Rosser ,  Sanjeev Balwant Sathe

IPC: H01L023/58

CPC classification number: H01L23/49838 ,  H01L21/563 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2224/0401

Abstract: An electronic packaging structure and method of forming thereof wherein the structure is constituted of a modular arrangement which reduces stresses generated in a chip, underfill, and ball grid array connection with a flexible substrate in the form of an organic material, which stresses may result in potential delamination due to thermally-induced warpage between the components of the modular arrangement.

Abstract translation: 一种电子封装结构及其形成方法，其中该结构由模块化布置构成，该模块布置减少了以有机材料形式的柔性基板的芯片，底部填充和球栅阵列连接中产生的应力，该应力可导致 由于模块化布置的组件之间的热引起的翘曲引起的潜在的分层。

公开(公告)号：US20040155339A1

公开(公告)日：2004-08-12

申请号：US10771728

申请日：2004-02-04

Applicant: International Business Machines Corporation

Inventor： William Infantolino ,  Li Li ,  Steven G. Rosser ,  Sanjeev Balwant Sathe

IPC: H01L023/48

CPC classification number: H01L23/49838 ,  H01L21/563 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2224/0401

Abstract: An electronic packaging structure and method of forming thereof wherein the structure is constituted of a modular arrangement which reduces stresses generated in a chip, underfill, and ball grid array connection with a flexible substrate in the form of an organic material, which stresses may result in potential delamination due to thermally-induced warpage between the components of the modular arrangement.