公开(公告)号：US20040161875A1

公开(公告)日：2004-08-19

申请号：US10775514

申请日：2004-02-10

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Jack Oon Chu ,  Basanth Jagannathan ,  Alfred Grill ,  Bernard Steele Meyerson ,  John Albrecht Ott

IPC: H01L031/0312 ,  H01L021/00

CPC classification number: C23C16/325 ,  C23C16/32 ,  C30B25/02 ,  C30B29/52 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/0245 ,  H01L21/02505 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02694 ,  Y10T428/12674

Abstract: A method and apparatus for depositing single crystal, epitaxial films of silicon carbon and silicon germanium carbon on a plurality of substrates in a hot wall, isothermal UHV-CVD system is described. In particular, a multiple wafer low temperature growth technique in the range from 350null C. to 750null C. is described for incorporating carbon epitaxially in Si and SiGe films with very abrupt and well defined junctions, but without any associated oxygen background contamination. Preferably, these epitakial SiC and SiGeC films are in-situ doped p- or n-type and with the presence of low concentration of carbon

Abstract translation: 描述了一种用于在热壁，等温UHV-CVD系统中在多个基板上沉积单晶，硅碳和硅锗碳外延膜的方法和装置。 特别地，描述了在350℃至750℃的范围内的多晶片低温生长技术，用于在Si和SiGe膜中外延引入碳，其具有非常突然且明确限定的结，但没有任何相关的氧背景污染。 优选地，这些表层SiC和SiGeC膜原位掺杂p型或n型，并且存在低浓度的碳<10 20 cm -3，生长的p型或n型掺杂剂 型材可以承受炉内退火温度为850°C，快速热退火温度至1000°C

公开(公告)号：US20030094130A1

公开(公告)日：2003-05-22

申请号：US09683088

申请日：2001-11-16

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Jack O. Chu ,  Basanth Jagannathan ,  Ryan Wayne Wuthrich

IPC: C30B023/00 ,  C30B025/00 ,  C30B028/12 ,  C30B028/14

CPC classification number: C23C16/54 ,  C23C16/4412 ,  C30B25/08 ,  C30B25/14 ,  Y10T117/10

Abstract: An apparatus and method for forming at least a portion of an electronic device include a High Vacuum-Chemical Vapor Deposition (UHV-CVD) system and a Low Pressure-Chemical Vapor Deposition (LPCVD) system using a common reactor. The invention overcomes the problem of silicon containing wafers being dipped in HF acid prior to CVD processing, and the problem of surface passivation between processes in multiple CVD reactors.

Abstract translation: 用于形成电子器件的至少一部分的装置和方法包括使用公共反应器的高真空 - 化学气相沉积（UHV-CVD）系统和低压 - 化学气相沉积（LPCVD）系统。 本发明克服了在CVD处理之前将含硅晶片浸入HF酸中的问题，以及在多个CVD反应器中的工艺之间的表面钝化的问题。

公开(公告)号：US20040063293A1

公开(公告)日：2004-04-01

申请号：US10676171

申请日：2003-10-01

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： David R. Greenberg ,  Basanth Jagannathan ,  Shwu-Jen Jeng ,  Joseph T. Kocis ,  Samuel C. Ramac ,  David M. Rockwell

IPC: H01L021/331 ,  H01L021/8222

CPC classification number: H01L29/66242 ,  H01L29/7378

Abstract: A method of fabricating a SiGe heterojunction bipolar transistor (HBT) is provided which results in a SiGe HBT that has a controllable current gain and improved breakdown voltage. The SiGe HBT having these characteristics is fabricated by forming an in-situ P-doped emitter layer atop a patterned SiGe base structure. The in-situ P-doped emitter layer is a bilayer of in-situ P-doped a:Si and in-situ P-doped polysilicon. The SiGe HBT structure including the above mentioned bilayer emitter is also described herein.

公开(公告)号：US20030057458A1

公开(公告)日：2003-03-27

申请号：US09962738

申请日：2001-09-25

Applicant: International Business Machines Corporation

Inventor： Gregory G. Freeman ,  Seshadri Subbanna ,  Basanth Jagannathan ,  Kathryn T. Schonenberg ,  Shwu-Jen Jeng ,  Kenneth J. Stein ,  Jeffrey B. Johnson

IPC: H01L029/80 ,  H01L031/112

CPC classification number: H01L29/66242 ,  H01L29/1004 ,  H01L29/7378

Abstract: A raised extrinsic base, silicon germanium (SiGe) heterojunction bipolar transistor (HBT), and a method of making the same is disclosed herein. The heterojunction bipolar transistor includes a substrate, a silicon germanium layer formed on the substrate, a collector layer formed on the substrate, a raised extrinsic base layer formed on the silicon germanium layer, and an emitter layer formed on the silicon germanium layer. The silicon germanium layer forms a heterojunction between the emitter layer and the raised extrinsic base layer. The bipolar transistor further includes a base electrode formed on a portion of the raised extrinsic base layer, a collector electrode formed on a portion of the collector layer, and an emitter electrode formed on a portion of the emitter layer. Thus, the heterojunction bipolar transistor includes a self-aligned raised extrinsic base, a minimal junction depth, and minimal interstitial defects influencing the base width, all being formed with minimal thermal processing. The heterojunction bipolar transistor simultaneously improves three factors that affect the speed and performance of bipolar transistors: base width, base resistance, and base-collector capacitance.

Abstract translation: 本文公开了一种凸起的外在基极，硅锗（SiGe）异质结双极晶体管（HBT）及其制造方法。 异质结双极晶体管包括基板，形成在基板上的硅锗层，形成在基板上的集电极层，形成在硅锗层上的升高的非本征基极层和形成在硅锗层上的发射极层。 硅锗层在发射极层和凸起的非本征基极层之间形成异质结。 双极晶体管还包括形成在凸起的非本征基极层的一部分上的基极，在集电极层的一部分上形成的集电极，以及形成在发射极层的一部分上的发射极。 因此，异质结双极晶体管包括自对准凸起的外在基极，最小结深度以及影响基底宽度的最小间隙缺陷，全部以最小的热处理形成。 异质结双极晶体管同时改善了影响双极晶体管速度和性能的三个因素：基极宽度，基极电阻和基极集电极电容。

公开(公告)号：US20020182423A1

公开(公告)日：2002-12-05

申请号：US09838892

申请日：2001-04-20

Applicant: International Business Machines Corporation

Inventor： Jack Oon Chu ,  Basanth Jagannathan ,  Alfred Grill ,  Bernard Steele Meyerson ,  John Albrecht Ott

IPC: B32B009/00 ,  C23C016/00

CPC classification number: C23C16/325 ,  C23C16/32 ,  C30B25/02 ,  C30B29/52 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/0245 ,  H01L21/02505 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02694 ,  Y10T428/12674

Abstract: A method and apparatus for depositing single crystal, epitaxial films of silicon carbon and silicon germanium carbon on a plurality of substrates in a hot wall, isothermal UHV-CVD system is described. In particular, a multiple wafer low temperature growth technique in the range from 350null C. to 750null C. is described for incorporating carbon epitaxially in Si and SiGe films with very abrupt and well defined junctions, but without any associated oxygen background contamination. Preferably, these epitaxial SiC and SiGeC films are in-situ doped p- or n-type and with the presence of low concentration of carbon

Abstract translation: 描述了一种用于在热壁，等温UHV-CVD系统中在多个基板上沉积单晶，硅碳和硅锗碳外延膜的方法和装置。 特别地，描述了在350℃至750℃的范围内的多晶片低温生长技术，用于在Si和SiGe膜中外延引入碳，其具有非常突然且明确限定的结，但没有任何相关的氧背景污染。 优选地，这些外延SiC和SiGeC膜原位掺杂p型或n型，并且存在低浓度的碳<1020cm-3，生长的p型或n型掺杂剂分布可以承受炉退火 到850℃的温度和快速热退火温度至1000℃

公开(公告)号：US20040110354A1

公开(公告)日：2004-06-10

申请号：US10316211

申请日：2002-12-10

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Wesley C. Natzle ,  David C. Ahlgren ,  Steven G. Barbee ,  Marc W. Cantell ,  Basanth Jagannathan ,  Louis D. Lanzerotti ,  Seshadri Subbanna ,  Ryan W. Wuthrich

IPC: H01L021/331 ,  H01L021/8222

CPC classification number: H01L29/66242 ,  H01L21/31116 ,  H01L21/8249

Abstract: An oxide etch process is described which may be used for emitter and base preparation in bipolar SiGe devices. The low temperature process employed produces electrical insulation between the emitter and base by a COR etch which preserves insulating TEOS glass. The insulating TEOS glass provides reduced capacitance and helps to achieve high speed. An apparatus is also described for practicing the disclosed process.

Abstract translation: 描述了氧化物蚀刻工艺，其可用于双极SiGe器件中的发射极和基极准备。 所采用的低温工艺通过保留绝缘TEOS玻璃的COR蚀刻产生发射极和基极之间的电绝缘。 绝缘TEOS玻璃提供降低的电容并有助于实现高速度。 还描述了用于实施所公开的方法的装置。

公开(公告)号：US20020121676A1

公开(公告)日：2002-09-05

申请号：US10122857

申请日：2002-04-15

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Jack Oon Chu ,  Douglas Duane Coolbaugh ,  James Stuart Dunn ,  David R. Greenberg ,  David L. Harame ,  Basanth Jagannathan ,  Robb Allen Johnson ,  Louis D. Lanzerotti ,  Kathryn Turner Schonenberg ,  Ryan Wayne Wuthrich

IPC: H01L027/082

CPC classification number: H01L29/66242 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02579 ,  H01L21/0262 ,  H01L29/1004 ,  H01L29/161 ,  H01L29/7378

Abstract: A SiGe bipolar transistor containing substantially no dislocation defects present between the emitter and collector region and a method of forming the same are provided. The SiGe bipolar transistor includes a collector region of a first conductivity type; a SiGe base region formed on a portion of said collector region; and an emitter region of said first conductivity type formed over a portion of said base region, wherein said collector region and said base region include carbon continuously therein. The SiGe base region is further doped with boron.

Abstract translation: 提供了在发射极和集电极区域之间基本上不存在位错缺陷的SiGe双极晶体管及其形成方法。 SiGe双极晶体管包括第一导电类型的集电极区域; 形成在所述集电区域的一部分上的SiGe基区; 以及形成在所述基极区域的一部分上的所述第一导电类型的发射极区域，其中所述集电极区域和所述基极区域在其中连续地包括碳。 SiGe基区进一步掺硼。

公开(公告)号：US20040161911A1

公开(公告)日：2004-08-19

申请号：US10775515

申请日：2004-02-10

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Jack Oon Chu ,  Basanth Jagannathan ,  Alfred Grill ,  Bernard Steele Meyerson ,  John Albrecht Ott

IPC: C30B001/00 ,  H01L021/20 ,  H01L021/36

CPC classification number: C23C16/325 ,  C23C16/32 ,  C30B25/02 ,  C30B29/52 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/0245 ,  H01L21/02505 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02694 ,  Y10T428/12674

Abstract: A method and apparatus for depositing single crystal, epitaxial films of silicon carbon and silicon germanium carbon on a plurality of substrates in a hot wall, isothermal UHV-CVD system is described. In particular, a multiple wafer low temperature growth technique in the range from 350null C. to 750null C. is described for incorporating carbon epitaxially in Si and SiGe films with very abrupt and well defined junctions, but without any associated oxygen background contamination. Preferably, these epitaxial SiC and SiGeC films are in-situ doped p- or n-type and with the presence of low concentration of carbon

Abstract translation: 描述了一种用于在热壁，等温UHV-CVD系统中在多个基板上沉积单晶，硅碳和硅锗碳外延膜的方法和装置。 特别地，描述了在350℃至750℃的范围内的多晶片低温生长技术，用于在Si和SiGe膜中外延引入碳，其具有非常突然且明确限定的结，但没有任何相关的氧背景污染。 优选地，这些外延SiC和SiGeC膜是原位掺杂的p型或n型，并且存在低浓度的碳<10 20 cm -3，生长的p型或n型掺杂剂 型材可以承受炉内退火温度为850°C，快速热退火温度至1000°C

公开(公告)号：US20030170960A1

公开(公告)日：2003-09-11

申请号：US09683983

申请日：2002-03-08

Applicant: International Business Machines Corporation

Inventor： Basanth Jagannathan ,  Alvin J. Joseph ,  Xuefeng Liu ,  Kathryn T. Schonenberg ,  Ryan W. Wuthrich

IPC: H01L021/331 ,  H01L021/8222 ,  H01L027/082 ,  H01L029/04 ,  H01L029/70

CPC classification number: H01L29/66242 ,  H01L29/1004 ,  H01L29/161 ,  H01L29/7378

Abstract: A high performance SiGe HBT that has a SiGe layer with a peak Ge concentration of at least approximately 20% and a boron-doped base region formed therein having a thickness. The base region includes diffusion-limiting impurities substantially throughout its thickness, at a peak concentration below that of boron in the base region. Both the base region and the diffusion-limiting impurities are positioned relative to a peak concentration of Ge in the SiGe layer so as to optimize both performance and yield.

Abstract translation: 具有峰值Ge浓度至少为20％的SiGe层和其中形成有硼掺杂基底区域的高性能SiGe HBT具有厚度。 碱性区域在其整个厚度上基本上包括扩散限制性杂质，峰值浓度低于碱性区域中硼的峰值浓度。 碱性区域和扩散限制杂质都相对于SiGe层中的Ge的峰值浓度定位，以便优化性能和产率。

公开(公告)号：US20030132453A1

公开(公告)日：2003-07-17

申请号：US10047975

申请日：2002-01-15

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： David R. Greenberg ,  Basanth Jagannathan ,  Shwu-Jen Jeng ,  Joseph T. Kocis ,  Samuel C. Ramac ,  David M. Rockwell

IPC: H01L021/8222 ,  H01L021/331 ,  H01L031/0328

CPC classification number: H01L29/66242 ,  H01L29/7378

Abstract: A method of fabricating a SiGe heterojunction bipolar transistor (HBT) is provided which results in a SiGe HBT that has a controllable current gain and improved breakdown voltage. The SiGe HBT having these characteristics is fabricated by forming an in-situ P-doped emitter layer atop a patterned SiGe base structure. The in-situ P-doped emitter layer is a bilayer of in-situ P-doped a:Si and in-situ P-doped polysilicon. The SiGe HBT structure including the above mentioned bilayer emitter is also described herein.