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公开(公告)号:US11847206B2
公开(公告)日:2023-12-19
申请号:US17367106
申请日:2021-07-02
申请人: Intel Corporation
发明人: Mingwei Zhang , Mingqiu Sun , Ravi L. Sahita , Chunhui Zhang , Xiaoning Li
CPC分类号: G06F21/53 , G06F8/441 , G06F9/3836 , G06F21/126 , G06F2221/2143
摘要: Technologies for untrusted code execution include a computing device having a processor with sandbox support. The computing device executes code included in a native domain in a non-privileged, native processor mode. The computing device may invoke a sandbox jump processor instruction during execution of the code in the native domain to enter a sandbox domain. The computing device executes code in the sandbox domain in a non-privileged, sandbox processor mode in response to invoking the sandbox jump instruction. While executing in the sandbox processor mode, the processor denies access to memory outside of the sandbox domain and may deny execution of one or more prohibited instructions. From the sandbox domain, the computing device may execute a sandbox exit instruction to exit the sandbox domain and resume execution in the native domain. The computing device may execute processor instructions to configure the sandbox domain. Other embodiments are described and claimed.
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公开(公告)号:US11556341B2
公开(公告)日:2023-01-17
申请号:US17341068
申请日:2021-06-07
申请人: Intel Corporation
发明人: Ravi Sahita , Deepak Gupta , Vedvyas Shanbhogue , David Hansen , Jason W. Brandt , Joseph Nuzman , Mingwei Zhang
摘要: Systems, methods, and apparatuses relating to instructions to compartmentalize memory accesses and execution (e.g., non-speculative and speculative) are described. In one embodiment, a compartment manager circuit is to determine, when a compartment control register of a hardware processor core is set to an enable value, that a first subset of code requested for execution on the hardware processor core in user privilege is within a first compartment of memory, load a first compartment descriptor for the first compartment into one or more registers of the hardware processor core from the memory, check if the first compartment is marked in the first compartment descriptor, within the one or more registers of the hardware processor core, as a management compartment, and, when the first compartment is marked in the first compartment descriptor as the management compartment, allowing the first subset of the code within the first compartment to load a second compartment descriptor for a second compartment of the memory into the one or more registers of the hardware processor core from the memory, switching execution from the first subset of code within the first compartment to a second subset of code in user privilege within the second compartment, allowing speculative memory accesses for the second subset of code only within the second compartment, and preventing a memory access outside of the second compartment for the second subset of code as indicated by the second compartment descriptor stored within the one or more registers of the hardware processor core.
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公开(公告)号:US20190042735A1
公开(公告)日:2019-02-07
申请号:US16145635
申请日:2018-09-28
申请人: Intel Corporation
发明人: Ravi Sahita , Mingwei Zhang
IPC分类号: G06F21/54 , G06F12/0877 , G06F21/56 , G06F9/455
摘要: Thus, the present disclosure is directed to systems and methods that include side channel defender circuitry to protect shared code pages in executable only memory (XOM) from side-channel exploits. The side channel defender circuitry receives system calls and determines whether code pages include executable code, whether the code pages include writeable code, and whether the code pages include instructions capable of altering or modifying one or more protection keys associated with code pages stored in XOM. If the code pages contain executable code that is writeable or executable code that includes instructions capable of altering or modifying one or more protection keys associated with code pages stored in XOM the side channel defender circuitry, the side channel defender circuitry aborts the system call.
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公开(公告)号:US20220012059A1
公开(公告)日:2022-01-13
申请号:US17341068
申请日:2021-06-07
申请人: Intel Corporation
发明人: Ravi Sahita , Deepak Gupta , Vedvyas Shanbhogue , David Hansen , Jason W. Brandt , Joseph Nuzman , Mingwei Zhang
摘要: Systems, methods, and apparatuses relating to instructions to compartmentalize memory accesses and execution (e.g., non-speculative and speculative) are described. In one embodiment, a compartment manager circuit is to determine, when a compartment control register of a hardware processor core is set to an enable value, that a first subset of code requested for execution on the hardware processor core in user privilege is within a first compartment of memory, load a first compartment descriptor for the first compartment into one or more registers of the hardware processor core from the memory, check if the first compartment is marked in the first compartment descriptor, within the one or more registers of the hardware processor core, as a management compartment, and, when the first compartment is marked in the first compartment descriptor as the management compartment, allowing the first subset of the code within the first compartment to load a second compartment descriptor for a second compartment of the memory into the one or more registers of the hardware processor core from the memory, switching execution from the first subset of code within the first compartment to a second subset of code in user privilege within the second compartment, allowing speculative memory accesses for the second subset of code only within the second compartment, and preventing a memory access outside of the second compartment for the second subset of code as indicated by the second compartment descriptor stored within the one or more registers of the hardware processor core.
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公开(公告)号:US11055401B2
公开(公告)日:2021-07-06
申请号:US15720083
申请日:2017-09-29
申请人: Intel Corporation
发明人: Mingwei Zhang , Mingqiu Sun , Ravi L. Sahita , Chunhui Zhang , Xiaoning Li
摘要: Technologies for untrusted code execution include a computing device having a processor with sandbox support. The computing device executes code included in a native domain in a non-privileged, native processor mode. The computing device may invoke a sandbox jump processor instruction during execution of the code in the native domain to enter a sandbox domain. The computing device executes code in the sandbox domain in a non-privileged, sandbox processor mode in response to invoking the sandbox jump instruction. While executing in the sandbox processor mode, the processor denies access to memory outside of the sandbox domain and may deny execution of one or more prohibited instructions. From the sandbox domain, the computing device may execute a sandbox exit instruction to exit the sandbox domain and resume execution in the native domain. The computing device may execute processor instructions to configure the sandbox domain. Other embodiments are described and claimed.
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公开(公告)号:US11029957B1
公开(公告)日:2021-06-08
申请号:US16833478
申请日:2020-03-27
申请人: INTEL CORPORATION
发明人: Ravi Sahita , Deepak Gupta , Vedvyas Shanbhogue , David Hansen , Jason W. Brandt , Joseph Nuzman , Mingwei Zhang
摘要: Systems, methods, and apparatuses relating to instructions to compartmentalize memory accesses and execution (e.g., non-speculative and speculative) are described. In one embodiment, a compartment manager circuit is to determine, when a compartment control register of a hardware processor core is set to an enable value, that a first subset of code requested for execution on the hardware processor core in user privilege is within a first compartment of memory, load a first compartment descriptor for the first compartment into one or more registers of the hardware processor core from the memory, check if the first compartment is marked in the first compartment descriptor, within the one or more registers of the hardware processor core, as a management compartment, and, when the first compartment is marked in the first compartment descriptor as the management compartment, allowing the first subset of the code within the first compartment to load a second compartment descriptor for a second compartment of the memory into the one or more registers of the hardware processor core from the memory, switching execution from the first subset of code within the first compartment to a second subset of code in user privilege within the second compartment, allowing speculative memory accesses for the second subset of code only within the second compartment, and preventing a memory access outside of the second compartment for the second subset of code as indicated by the second compartment descriptor stored within the one or more registers of the hardware processor core.
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7.
公开(公告)号:US10579791B2
公开(公告)日:2020-03-03
申请号:US15061489
申请日:2016-03-04
申请人: Intel Corporation
发明人: Mingwei Zhang , Ravi L. Sahita
IPC分类号: G06F21/53
摘要: Technologies for defeating secure enclave side-channel attacks include a computing device having a processor with secure enclave support. The computing device instruments an executable binary with multiple gadgets, a fault-generating function, and at least one invocation of the fault-generating function. The computing device executes the instrumented executable binary within a secure enclave. During execution of the instrumented binary, each gadget may be located at a different memory page of the secure enclave. The computing device invokes the fault-generating function, which selects a random sequence of the gadgets and executes the random sequence of gadgets. The processor may generate a page fault in response to executing each of the gadgets. Each gadget may generate one or more data accesses to memory pages within the secure enclave. The processor may generate a page fault in response to each of the data accesses. Other embodiments are described and claimed.
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公开(公告)号:US11562063B2
公开(公告)日:2023-01-24
申请号:US17114246
申请日:2020-12-07
申请人: INTEL CORPORATION
发明人: Michael Lemay , David M. Durham , Michael E. Kounavis , Barry E. Huntley , Vedvyas Shanbhogue , Jason W. Brandt , Josh Triplett , Gilbert Neiger , Karanvir Grewal , Baiju Patel , Ye Zhuang , Jr-Shian Tsai , Vadim Sukhomlinov , Ravi Sahita , Mingwei Zhang , James C. Farwell , Amitabh Das , Krishna Bhuyan
摘要: Disclosed embodiments relate to encoded inline capabilities. In one example, a system includes a trusted execution environment (TEE) to partition an address space within a memory into a plurality of compartments each associated with code to execute a function, the TEE further to assign a message object in a heap to each compartment, receive a request from a first compartment to send a message block to a specified destination compartment, respond to the request by authenticating the request, generating a corresponding encoded capability, conveying the encoded capability to the destination compartment, and scheduling the destination compartment to respond to the request, and subsequently, respond to a check capability request from the destination compartment by checking the encoded capability and, when the check passes, providing a memory address to access the message block, and, otherwise, generating a fault, wherein each compartment is isolated from other compartments.
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公开(公告)号:US10810305B2
公开(公告)日:2020-10-20
申请号:US15899229
申请日:2018-02-19
申请人: Intel Corporation
发明人: Mingwei Zhang , Ravi Sahita
摘要: Systems, apparatuses and methods may provide technology for securing untrusted code using memory protection keys and control flow integrity, by applying a memory protection key to one or more memory regions, enforcing control flow integrity with respect to the one or more memory regions, and executing untrusted code in an isolated region of the one or more memory regions.
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公开(公告)号:US10706164B2
公开(公告)日:2020-07-07
申请号:US15721082
申请日:2017-09-29
申请人: Intel Corporation
摘要: Apparatuses for computing are disclosed herein. In embodiments, an apparatus may include one or more processors, a memory, and a compiler to be operated by the one or more processors to compile a computer program. The compiler may include one or more analyzers to parse and analyze source code of the computer program that generates pointers or de-references pointers. The compiler may also include a code generator coupled to the one or more analyzers to generate executable instructions for the source code of the computer program including insertion of additional encryption or decryption executable instructions into the computer program, based at least in part on a result of the analysis, to authenticate memory access operations of the source code.
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