公开(公告)号：US11983116B2

公开(公告)日：2024-05-14

申请号：US17973427

申请日：2022-10-25

Applicant: Huawei Technologies Co., Ltd.

Inventor： Sang Wook Do ,  Wei-Yu Chen ,  Gang Liu

IPC: G06F12/0862 ,  G06F9/32 ,  G06F12/0811

CPC classification number: G06F12/0862 ,  G06F9/321 ,  G06F12/0811

Abstract: The disclosure relates to technology for pre-fetching data. An apparatus comprises a processor core, pre-fetch logic, and a memory hierarchy. The pre-fetch logic is configured to generate cache pre-fetch requests for a program instruction identified by a program counter. The pre-fetch logic is configured to track one or more statistics with respect to the cache pre-fetch requests. The pre-fetch logic is configured to link the one or more statistics with the program counter. The pre-fetch logic is configured to determine a degree of the cache pre-fetch requests for the program instruction based on the one or more statistics. The memory hierarchy comprises main memory and a hierarchy of caches. The memory hierarchy further comprises a memory controller configured to pre-fetch memory blocks identified in the cache pre-fetch requests from a current level in the memory hierarchy into a higher level of the memory hierarchy.

公开(公告)号：US20230049662A1

公开(公告)日：2023-02-16

申请号：US17973427

申请日：2022-10-25

Applicant: Huawei Technologies Co., Ltd.

Inventor： Sang Wook Do ,  Wei-Yu Chen ,  Norris Liu

IPC: G06F12/0862 ,  G06F12/0811 ,  G06F9/32

Abstract: The disclosure relates to technology for pre-fetching data. An apparatus comprises a processor core, pre-fetch logic, and a memory hierarchy. The pre-fetch logic is configured to generate cache pre-fetch requests for a program instruction identified by a program counter. The pre-fetch logic is configured to track one or more statistics with respect to the cache pre-fetch requests. The pre-fetch logic is configured to link the one or more statistics with the program counter. The pre-fetch logic is configured to determine a degree of the cache pre-fetch requests for the program instruction based on the one or more statistics. The memory hierarchy comprises main memory and a hierarchy of caches. The memory hierarchy further comprises a memory controller configured to pre-fetch memory blocks identified in the cache pre-fetch requests from a current level in the memory hierarchy into a higher level of the memory hierarchy.

公开(公告)号：US20240320008A1

公开(公告)日：2024-09-26

申请号：US18680778

申请日：2024-05-31

Applicant: Huawei Technologies Co., Ltd.

Inventor： Fangping Liu ,  Sang Wook Do ,  Richard Van

IPC: G06F9/38 ,  G06F9/32

CPC classification number: G06F9/3844 ,  G06F9/321

Abstract: The present disclosure related to perceptron based branch prediction methods, devices, and systems. One example method includes storing, in a memory, multiple perceptron tables, determining, based on a branch program counter (PC) and a branch history and from among the multiple perceptron tables, a perceptron stored in a first perceptron table, obtaining weights of the perceptron stored in the first perceptron table, determining, based on the weights and the branch history, a branch prediction indicating a prediction of a direction that a branch will take upon instruction execution, and obtaining one or more instructions based on the predicted direction. Each perceptron table of the multiple perceptron tables has a different branch history length and a different tag length.