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公开(公告)号：US12149603B2
公开(公告)日：2024-11-19
申请号：US17857412
申请日：2022-07-05
Applicant: Huawei Technologies Co., Ltd.
Inventor： Jingfei Lv , Yawei Zhang , Jinhui Wang , Hao Li
Abstract: A clock port attribute recovery method includes a network device setting a value of a port attribute of a clock port of the network device to a first value based on the clock port not receiving any one of three types of clock messages: N synchronization messages, follow-up messages, and delay response messages within a timeout interval, where the first value indicates that a message is lost on the clock port. Based on a case that a recovery condition is met, the network device sets the value of the port attribute of the clock port to a second value, where the second value indicates that a status of the clock port is that the message is not lost.
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公开(公告)号：US11960318B2
公开(公告)日：2024-04-16
申请号：US17529823
申请日：2021-11-18
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Wei Wu , Jinhui Wang , Hao Li , Yong Yang , Xinhua Huang
Abstract: A clock oscillator, a clock oscillator production method and use method, and a chip including the clock oscillator are provided. The clock oscillator includes a resonator, a shock-absorbing material layer, and a base, and at least a part of the shock-absorbing material layer is located between the resonator and the base. In the clock oscillator, the shock-absorbing material layer is added between the resonator and the base, and the shock-absorbing material layer can effectively prevent a mechanical wave from being conducted between the base and the resonator, so that the resonator is protected from external vibration. This can ensure, when there is external vibration, that an output frequency of the resonator is not deteriorated and improve shock absorption performance of the clock oscillator.
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公开(公告)号：US20240056209A1
公开(公告)日：2024-02-15
申请号：US18492506
申请日：2023-10-23
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Jingfei Lyu , Fanshun Meng , Jinhui Wang , Wei Su
IPC: H04J3/06
CPC classification number: H04J3/0658
Abstract: A method and an apparatus determines a network device receiving a first signal and at least one second signal, wherein the first signal carries data to be sent through a first flexible Ethernet interface. A first physical layer clock is determined based on the first signal. A second physical layer clock is determined based on the at least one second signal or the first physical layer clock and the at least one second signal. The first physical layer clock or the second physical layer clock is used as a sending clock of a non-flexible Ethernet interface. The network device includes the first flexible Ethernet interface and the non-flexible Ethernet interface.
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公开(公告)号：US11750310B2
公开(公告)日：2023-09-05
申请号：US17471676
申请日：2021-09-10
Applicant: Huawei Technologies Co., Ltd.
Inventor： Jingfei Lv , Boling Fan , Jinhui Wang , Liqing Chen
CPC classification number: H04J3/0667 , H04L7/0012 , H04L7/0025 , H04L7/0029
Abstract: A clock synchronization packet exchanging method includes sending, by a first device in a Flexible Ethernet (FlexE) group, a first FlexE instance at a first physical layer (PHY), where the first FlexE instance includes a clock synchronization packet, and a second FlexE instance sent by the first device in the FlexE group at a second PHY also includes a clock synchronization packet. The clock synchronization packets are carried in a plurality of FlexE instances transmitted between a transmit end and a receive end in the FlexE group.
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公开(公告)号：US20220311532A1
公开(公告)日：2022-09-29
申请号：US17840965
申请日：2022-06-15
Applicant: Huawei Technologies Co., Ltd.
Inventor： Jinhui Wang , Cong Chen , Jingfei Lv
IPC: H04J3/06 , H04B10/079
Abstract: A fiber link detection method is implemented by a first network device of an optical communications network. The fiber link detection method includes obtaining a forward delay value indicating a forward delay of transmitting a first Precision Time Protocol (PTP) packet by a second interface of a second network device to a first interface of the first network device over a fiber link. A reverse delay value indicating a reverse delay of transmitting a second PTP packet by the first interface to the second interface over the fiber link is obtained, and a determination is made, based on the forward delay value, the reverse delay value, and a first threshold, that the fiber link comprises a third network device, where the first network device and the second network device support a PTP, and where the third network device does not support the PTP.
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Patent Agency Ranking
公开(公告)号：US11343007B2
公开(公告)日：2022-05-24
申请号：US16730027
申请日：2019-12-30
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Jinhui Wang , Song Liu , Hongwei Niu , Yunlei Qi
IPC: H04J3/06
Abstract: A time synchronization method includes receiving, by a receive-end device, a first timestamp and a first header signal sent by a transmit-end device, where the first timestamp indicates a first moment at which a first channel medium conversion module sends the first header signal, and a second moment at which the receive-end device receives the first header signal. The method further includes sending a second header signal to the transmit-end device, where a third moment at which the receive-end device sends the second header signal. The method further includes receiving a fourth timestamp sent by the transmit-end device, where the fourth timestamp indicates a fourth moment at which the transmit-end device receives the second header signal. The method further includes synchronizing time with the transmit-end device based on the first moment, the second moment, the third moment, and the fourth moment.
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公开(公告)号：US11177931B2
公开(公告)日：2021-11-16
申请号：US16449443
申请日：2019-06-23
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Jinhui Wang , Xingjian Shi , Feng Wu
Abstract: Embodiments relate to optical transport technologies, and more specifically, to a clock transmission method. Under this method, a first optical data unit (ODU) container can be obtained. Phase discrimination can be performed on an obtained first clock and a first ODU clock of a transmit end, to generate a first PD value. The first PD value can then be inserted into an overhead of the first ODU container. The first ODU container can be encapsulated into a second ODU container, and the second ODU container can be sent. A rate of the second ODU container is higher than a rate of the first ODU container. The first PD value is transmitted in the first ODU container which is not decapsulated in a subsequent transmission process. Therefore, final recovery of the first clock is not affected, so that a deviation between a finally recovered clock and the first clock is greatly reduced.
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公开(公告)号：US10855387B2
公开(公告)日：2020-12-01
申请号：US16259142
申请日：2019-01-28
Applicant: Huawei Technologies Co., Ltd.
Inventor： Junfeng Luo , Jinhui Wang , Zhu Cheng , Feng Wu
Abstract: A time synchronization method and a device, where the method includes generating, by a first device, a first time synchronization frame according to a first coding scheme, where the first time synchronization frame includes a first frame header and a first time of day (TOD), the first frame header carries an identifier of the first coding scheme, and the first coding scheme defines a boundary of the first time synchronization frame and a location of the first TOD in the first time synchronization frame, and sending, by the first device, the first time synchronization frame to a second device using a first single line to trigger the second device to identify the first time synchronization frame according to the identifier of the first coding scheme, to obtain the first TOD from the first time synchronization frame, and to trace a time of the first device according to the first TOD.
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公开(公告)号：US12160308B2
公开(公告)日：2024-12-03
申请号：US17840965
申请日：2022-06-15
Applicant: Huawei Technologies Co., Ltd.
Inventor： Jinhui Wang , Cong Chen , Jingfei Lv
IPC: H04J3/06 , H04B10/079
Abstract: A fiber link detection method is implemented by a first network device of an optical communications network. The fiber link detection method includes obtaining a forward delay value indicating a forward delay of transmitting a first Precision Time Protocol (PTP) packet by a second interface of a second network device to a first interface of the first network device over a fiber link. A reverse delay value indicating a reverse delay of transmitting a second PTP packet by the first interface to the second interface over the fiber link is obtained, and a determination is made, based on the forward delay value, the reverse delay value, and a first threshold, that the fiber link comprises a third network device, where the first network device and the second network device support a PTP, and where the third network device does not support the PTP.
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公开(公告)号：US20220171426A1
公开(公告)日：2022-06-02
申请号：US17536735
申请日：2021-11-29
Applicant: Huawei Technologies Co., Ltd.
Inventor： Jinhui Wang , Wei Wu , Xiaoyi Zeng , Xinhua Huang
Abstract: A clock oscillator includes a first resonator, a second resonator, and a frequency synthesis module, where an output frequency of the first resonator is higher than an output frequency of the second resonator, the frequency synthesis module is configured to generate a synthesis frequency based on the output frequency of the first resonator and the output frequency of the second resonator, and the synthesis frequency is used as a clock frequency output by the clock oscillator. The clock oscillator uses both of the two resonators with the different output frequencies as clock signal sources, and generates a synthesized clock signal by using the frequency synthesis module.
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