Abstract:
METHOD OF MANUFACTURE OF SEMICONDUCTOR DEVICES HAVING A PLANAR SURFACE INCLUDING INTRODUCING A FIRST IMPURITY THROUGH A MASK INTO A SUBSTRATE TO FORM A FIRST DOPED AREA AND INTRODUCING A SECOND IMPURITY THROUGH THE MASK INTO A SELECTED PORTION OF THE SUBSTRATE TO A DEPTH GREATER THAN THE DEPTH OF THE FIRST DOPED AREA SO AS TO UNDERLIE SAID AREA, SAID SECOND IMPURITY HAVING A DIFFUSIN CONSTANT WHICH IS GREATER THEN THAT OF SAID FIRST IMPURITY IN THE SUBSTRATE.
Abstract:
A method of assembly of a transistor, wherein a lead support member and pairs of collector lead molds are punched in advance in a tape-shaped metal sheet; a lead support member corresponding to said lead support member and pairs of emitter-base lead molds are punched in another tape-shaped metal sheet; a collector electrode of a planar type transistor is put into contact with the center of said collector lead; the position of the end parts of the base and emitter leads with respect to the position of said collector lead is defined by piling up said two support members and thereby the end parts of said two leads are put into contact with said base and emitter electrodes of the transistor; all of said leads and electrodes corresponding thereto are coupled mutually by soldering; said transistor part is molded with resin; and said leads are removed from said respective support members.