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公开(公告)号：US20090096520A1
公开(公告)日：2009-04-16
申请号：US12248581
申请日：2008-10-09
申请人： Gilles Bas , Marc Battista
发明人： Gilles Bas , Marc Battista
CPC分类号： H03D1/00
摘要： A method and a circuit for detecting a radio-frequency signal, including at least one first MOS transistor with a channel of a first type, having its gate coupled to an input terminal capable of receiving said signal; a circuit for biasing the first transistor, capable of biasing it to a level lower than its threshold voltage; and a circuit for determining the average value of the current in the first transistor.
摘要翻译： 一种用于检测射频信号的方法和电路，包括具有第一类型的信道的至少一个第一MOS晶体管，其栅极耦合到能够接收所述信号的输入端; 用于偏置第一晶体管的电路，其能够将其偏置到低于其阈值电压的电平; 以及用于确定第一晶体管中的电流的平均值的电路。
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公开(公告)号：US07839210B2
公开(公告)日：2010-11-23
申请号：US12248581
申请日：2008-10-09
申请人： Gilles Bas , Marc Battista
发明人： Gilles Bas , Marc Battista
CPC分类号： H03D1/00
摘要： A method and a circuit for detecting a radio-frequency signal, including at least one first MOS transistor with a channel of a first type, having its gate coupled to an input terminal capable of receiving said signal; a circuit for biasing the first transistor, capable of biasing it to a level lower than its threshold voltage; and a circuit for determining the average value of the current in the first transistor.
摘要翻译： 一种用于检测射频信号的方法和电路，包括具有第一类型的信道的至少一个第一MOS晶体管，其栅极耦合到能够接收所述信号的输入端; 用于偏置第一晶体管的电路，其能够将其偏置到低于其阈值电压的电平; 以及用于确定第一晶体管中的电流的平均值的电路。
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公开(公告)号：US08802455B2
公开(公告)日：2014-08-12
申请号：US13435201
申请日：2012-03-30
申请人： Francois Tailliet , Marc Battista , Luc Wuidart
发明人： Francois Tailliet , Marc Battista , Luc Wuidart
IPC分类号： H01L21/66
CPC分类号： H04W12/04 , G01R31/31719 , G06F21/70 , H01L22/14 , H01L22/20 , H01L2924/0002 , H04W12/08 , H01L2924/00
摘要： A process is provided for fabricating a wafer including a plurality of chips separated by scribe lines. The method includes locking at least one chip on the wafer using a secret key, and writing the secret key into at least one memory present on the wafer.
摘要翻译： 提供了一种用于制造包括由划线分开的多个芯片的晶片的工艺。 该方法包括使用秘密密钥将晶片上的至少一个芯片锁定，并将秘密密钥写入存在于晶片上的至少一个存储器。
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公开(公告)号：US20120250429A1
公开(公告)日：2012-10-04
申请号：US13435201
申请日：2012-03-30
申请人： FRANCOIS TAILLIET , Marc Battista , Luc Wuidart
发明人： FRANCOIS TAILLIET , Marc Battista , Luc Wuidart
CPC分类号： H04W12/04 , G01R31/31719 , G06F21/70 , H01L22/14 , H01L22/20 , H01L2924/0002 , H04W12/08 , H01L2924/00
摘要： A process is provided for fabricating a wafer including a plurality of chips separated by scribe lines. The method includes locking at least one chip on the wafer using a secret key, and writing the secret key into at least one memory present on the wafer.
摘要翻译： 提供了一种用于制造包括由划线分开的多个芯片的晶片的工艺。 该方法包括使用秘密密钥将晶片上的至少一个芯片锁定，并将秘密密钥写入存在于晶片上的至少一个存储器。
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5.发明授权Electronic circuit having a diode-connected MOS transistor with an improved efficiency 有权具有二极管连接的MOS晶体管的电子电路具有提高的效率公开(公告)号：US08445947B2
公开(公告)日：2013-05-21
申请号：US12497210
申请日：2009-07-02
申请人： Marc Battista , Hervé Chalopin , Hervé Barthelemy
发明人： Marc Battista , Hervé Chalopin , Hervé Barthelemy
IPC分类号： H01L21/28
CPC分类号： H01L27/0811 , H01L27/0727 , H01L29/783 , H01L29/861 , H02M3/07
摘要： An integrated circuit including a semiconductor layer; and a MOS transistor including first and second power terminals and a bulk insulated from the semiconductor layer, the first power terminal being intended to receive an oscillating signal, the transistor gate and the bulk being connected to the first power terminal.
摘要翻译： 一种包括半导体层的集成电路; 以及MOS晶体管，包括第一和第二电源端子以及与半导体层绝缘的体积，第一电源端子旨在接收振荡信号，晶体管栅极和体积连接到第一电力端子。
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6.发明申请ELECTRONIC CIRCUIT HAVING A DIODE-CONNECTED MOS TRANSISTOR WITH AN IMPROVED EFFICIENCY 有权具有改善效率的二极管连接MOS晶体管的电子电路公开(公告)号：US20100034000A1
公开(公告)日：2010-02-11
申请号：US12497210
申请日：2009-07-02
申请人： Marc Battista , Hervé Chalopin , Hérve Barthelemy
发明人： Marc Battista , Hervé Chalopin , Hérve Barthelemy
IPC分类号： H02M7/217
CPC分类号： H01L27/0811 , H01L27/0727 , H01L29/783 , H01L29/861 , H02M3/07
摘要： An integrated circuit including a semiconductor layer; and a MOS transistor including first and second power terminals and a bulk insulated from the semiconductor layer, the first power terminal being intended to receive an oscillating signal, the transistor gate and the bulk being connected to the first power terminal.
摘要翻译： 一种包括半导体层的集成电路; 以及MOS晶体管，包括第一和第二电源端子以及与半导体层绝缘的体积，第一电源端子旨在接收振荡信号，晶体管栅极和体积连接到第一电力端子。
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