公开(公告)号：US11664432B2

公开(公告)日：2023-05-30

申请号：US16556796

申请日：2019-08-30

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Dirk Utess ,  Zhixing Zhao ,  Dominik M. Kleimaier ,  Irfan A. Saadat ,  Florent Ravaux

IPC: H01L27/092 ,  H01L29/417 ,  H01L29/40 ,  H01L29/78

CPC classification number: H01L29/41775 ,  H01L27/092 ,  H01L29/401 ,  H01L29/7845

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a layout optimization for radio frequency (RF) device performance and methods of manufacture. The structure includes: a first active device on a substrate; source and drain diffusion regions adjacent to the first active device; and a first contact in electrical contact with the source and drain diffusion regions and which is spaced away from the first active device to optimize a stress component in a channel region of the first active device.