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公开(公告)号：US3418713A
公开(公告)日：1968-12-31
申请号：US62579967
申请日：1967-03-24
Applicant: GEN ELECTRIC
Inventor： BAUER DOUGLAS M
IPC: B26B7/00
CPC classification number: B26B7/005
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公开(公告)号：US3569737A
公开(公告)日：1971-03-09
申请号：US3569737D
申请日：1968-07-17
Applicant: GEN ELECTRIC
Inventor： BAUER DOUGLAS M , GOZEMBA GERFRIED M
CPC classification number: G01P3/4805 , G01R23/09
Abstract: A frequency to DC converter. A frequency input signal alternately switches complementary field effect transistor gate electrodes between two reference voltages. Alternate conduction of the field effect transistors causes two series-connected capacitors, each in parallel with one field effect transistor, to be alternately charged and discharged. Charging currents are converted to DC voltages proportional to frequency in a resistive filter network and are coupled to an indication circuit.
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公开(公告)号：US3555900A
公开(公告)日：1971-01-19
申请号：US3555900D
申请日：1968-12-05
Applicant: GEN ELECTRIC
Inventor： BAUER DOUGLAS M , TAYLOR CLEMENT F
Abstract: A MASS FLOWMETER SYSTEM OF THE ANGULAR MOMENTUM TYPE COMPRISING SWIRL GENERATING MEANS, A SPEED TURBINE AND A REACTION TURBINE RESTRAINED BY AN ELECTROMAGNETIC TORQUE MOTOR. THE REACTION TURBINE IS MAINTAINED IN A BALANCED CONDITION BY A CONTROL LOOP INTO WHICH TURBINE SPEED AND POSITION SIGNALS ARE INTRODUCED TO CONTROL THE TORQUE MOTOR CURRENT AND TORQUE. IN THIS MANNER AUTOMATIC COMPENSATION FOR CHANGES IN SWIRL VELOCITY IS OBTAINED PERMITTING DIRECT MEASUREMENT OF MASS FLOW RATE WITHOUT NEED FOR MAINTAINING CONSTANT SWIRL VELOCITY. BOTH ANALOG AND DIGITAL CONTROL AND INDICATING SYSTEMS ARE DISCLOSED.
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公开(公告)号：US3484668A
公开(公告)日：1969-12-16
申请号：US3484668D
申请日：1968-07-17
Applicant: GEN ELECTRIC
Inventor： BAUER DOUGLAS M
IPC: H03F3/26
CPC classification number: H03F3/26
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公开(公告)号：US3678500A
公开(公告)日：1972-07-18
申请号：US3678500D
申请日：1970-08-04
Applicant: GEN ELECTRIC
Inventor： BAUER DOUGLAS M
Abstract: An analog to digital converter system is provided for producing an output frequency indicative of the ratio of first and second direct current signals. A summing circuit has a first direct current voltage connected to its non-inverting input and provides an output to an integrator. The integrator output is coupled to and controls a voltage controlled oscillator which provides a train of output pulses. The second direct current voltage is coupled to a frequency to direct current converter connected in a feedback loop between the oscillator and an inverting input of the summing network. The output of the summing network is thus nulled at a pulse rate proportional to the ratio of the voltages. The output of the voltage controlled oscillator may then be supplied to a digital readout device to provide a visual indication of the ratio of the first and second voltages.
Abstract translation: 模数转换器系统被提供用于产生指示第一和第二直流信号的比率的输出频率。 求和电路具有连接到其非反相输入的第一直流电压并向积分器提供输出。 积分器输出耦合到并控制提供一串输出脉冲的压控振荡器。 第二直流电压耦合到连接在振荡器和求和网络的反相输入之间的反馈环路中的直流电转换器的频率。 因此，求和网络的输出以与电压比率成比例的脉冲速率为零。 然后可以将压控振荡器的输出提供给数字读出装置，以提供第一和第二电压的比率的视觉指示。
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Patent Agency Ranking
公开(公告)号：US3617902A
公开(公告)日：1971-11-02
申请号：US3617902D
申请日：1970-08-04
Applicant: GEN ELECTRIC
Inventor： BAUER DOUGLAS M
Abstract: A frequency multiplier which comprises a voltage-controlled oscillator the output of which is controlled by differential integrator. First and second bistable logic circuits are connected to the inputs of the integrator. The first bistable logic circuit changes its state in response to an input pulse to produce a control voltage for the oscillator from the integrator. A feedback loop from the oscillator to the second bistable circuit includes a counter coupled to the second bistable logic circuit to change the state of the second bistable logic and resets the first circuit after a predetermined number of output pulses. This sequence controls the input level to the voltagecontrolled oscillator, and hence the multiplication factor of the circuit.
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公开(公告)号：US3601707A
公开(公告)日：1971-08-24
申请号：US3601707D
申请日：1969-08-21
Applicant: GEN ELECTRIC
Inventor： BAUER DOUGLAS M
CPC classification number: G01R23/09 , G01P3/4802
Abstract: A frequency to direct current converter is provided in which an input signal, which may be a sinusoidal wave or a pulse train, is applied to a first bistable logic circuit to determine its state. The logic circuit is utilized to provide an input indicative of an input signal to a second bistable logic circuit to which timing pulses are applied from an external clock source. The timing pulses initiate a change in the states of the bistable logic circuits so that a direct current pulse of uniform width is produced for each input wave applied to the first bistable circuit. The direct current pulses may be averaged or utilized to control a chopper circuit to produce a direct current output indicative of the frequency of the input signal.
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公开(公告)号：US3621469A
公开(公告)日：1971-11-16
申请号：US3621469D
申请日：1969-08-21
Applicant: GEN ELECTRIC
Inventor： BAUER DOUGLAS M
CPC classification number: H03K7/06
Abstract: A voltage controlled oscillator is provided in which a minimal number of switching elements are employed to produce output pulses. A current source circuit determines the charging rate of a capacitor in response to an input voltage. As the capacitor charges, the potential level at one terminal thereof, which is coupled to a comparator circuit, decreases. When this potential reaches a predetermined level, the output of the comparator circuit changes state to control a switching device which produces an output pulse. In one form of the invention, the predetermined level is determined by the input voltage. Means are coupled to the output of the comparator circuit to discharge the capacitor when the output pulse is produced.
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公开(公告)号：US3588856A
公开(公告)日：1971-06-28
申请号：US3588856D
申请日：1968-07-17
Applicant: GEN ELECTRIC
Inventor： BAUER DOUGLAS M , NAGEL MARTIN J
CPC classification number: G08B5/24
Abstract: AN INDICATING INSTRUMENT FAILURE WARNING CIRCUIT FOR ENERGIZING A FAILURE WARNING MECHANISM. A TIMING CIRCUIT IS RESPONSIVE TO A DECREASE IN OR A PRESENCE OF DIVERSE CONDITION SIGNALS TO TURN OFF A SWITCHING TRANSISTOR. A DECREASE IN THE POWER SUPPLY VOLTAGE CAUSES A ZENER DIODE TO BLOCK BASE CURRENT TO THE SWITCHING TRANSMITOR THEREBY TURNING IT OFF. A VOLTAGE DECREASE AT A POWER SUPPLY ENERGIZING THE FAILURE WARNING MECHANISM OR TURNING OFF THE SWITCHING TRANSISTOR PRODUCES A FAILURE WARNING.
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公开(公告)号：US3564288A
公开(公告)日：1971-02-16
申请号：US3564288D
申请日：1968-06-21
Applicant: GEN ELECTRIC
Inventor： BAUER DOUGLAS M
CPC classification number: H03F3/393
Abstract: An inherently balanced, thermally stable signal chopper circuit. A field effect transistor connected across a variable signal source is driven by a chopper drive circuit. The chopped signal is applied to a differential amplifier. Grounding the substrate balances and minimizes interelectrode capacitances to minimize chopper drive signals at the differential amplifier output.
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