公开(公告)号：US09111937B2

公开(公告)日：2015-08-18

申请号：US13903230

申请日：2013-05-28

Applicant: Freescale Semiconductor, Inc.

Inventor： Burton J. Carpenter, Jr. ,  Twila J. Eichman

IPC: H01L23/52 ,  H01L23/532 ,  H01L23/522 ,  H01L23/538

CPC classification number: H01L23/53228 ,  H01L23/5226 ,  H01L23/5329 ,  H01L23/5381 ,  H01L23/5383 ,  H01L23/5387 ,  H01L23/5389 ,  H01L24/50 ,  H01L2224/04105 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2224/73229 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/15192 ,  H01L2924/30107

Abstract: Semiconductor devices with multilayer flex interconnect structures. In some embodiments, a semiconductor device may include a semiconductor chip coupled to a planar substrate and a multilayer flex interconnect structure coupled to the semiconductor chip, the multilayer flex interconnect structure including at least: a first conductive layer, a second conductive layer, and a dielectric layer disposed between the first and second conductive layers. The semiconductor device may also include another semiconductor chip coupled to the planar substrate and placed in a side-by-side configuration with respect to the semiconductor chip, where the multilayer flex interconnect structure provides electrical connections between at least two terminals of the semiconductor chip and at least two terminals of the other semiconductor chip.

Abstract translation: 具有多层柔性互连结构的半导体器件。 在一些实施例中，半导体器件可以包括耦合到平面衬底的半导体芯片和耦合到半导体芯片的多层柔性互连结构，所述多层柔性互连结构至少包括：第一导电层，第二导电层和 介电层设置在第一和第二导电层之间。 半导体器件还可以包括耦合到平面衬底并且相对于半导体芯片并排配置的另一个半导体芯片，其中多层柔性互连结构提供半导体芯片的至少两个端子之间的电连接和 另一个半导体芯片的至少两个端子。

公开(公告)号：US20140353830A1

公开(公告)日：2014-12-04

申请号：US13903230

申请日：2013-05-28

Applicant: Freescale Semiconductor, Inc.

Inventor： Burton J. Carpenter, Jr. ,  Twila J. Eichman

IPC: H01L23/532 ,  H01L23/522

CPC classification number: H01L23/53228 ,  H01L23/5226 ,  H01L23/5329 ,  H01L23/5381 ,  H01L23/5383 ,  H01L23/5387 ,  H01L23/5389 ,  H01L24/50 ,  H01L2224/04105 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2224/73229 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/15192 ,  H01L2924/30107

Abstract: Semiconductor devices with multilayer flex interconnect structures. In some embodiments, a semiconductor device may include a semiconductor chip coupled to a planar substrate and a multilayer flex interconnect structure coupled to the semiconductor chip, the multilayer flex interconnect structure including at least: a first conductive layer, a second conductive layer, and a dielectric layer disposed between the first and second conductive layers. The semiconductor device may also include another semiconductor chip coupled to the planar substrate and placed in a side-by-side configuration with respect to the semiconductor chip, where the multilayer flex interconnect structure provides electrical connections between at least two terminals of the semiconductor chip and at least two terminals of the other semiconductor chip.

Abstract translation: 具有多层柔性互连结构的半导体器件。 在一些实施例中，半导体器件可以包括耦合到平面衬底的半导体芯片和耦合到半导体芯片的多层柔性互连结构，所述多层柔性互连结构至少包括：第一导电层，第二导电层和 介电层设置在第一和第二导电层之间。 半导体器件还可以包括耦合到平面衬底并且相对于半导体芯片并排配置的另一个半导体芯片，其中多层柔性互连结构提供半导体芯片的至少两个端子之间的电连接和 另一个半导体芯片的至少两个端子。