SEMICONDUCTOR DEVICE
    1.
    发明申请

    公开(公告)号:US20210234031A1

    公开(公告)日:2021-07-29

    申请号:US17129552

    申请日:2020-12-21

    申请人: FUJITSU LIMITED

    IPC分类号: H01L29/778

    摘要: A disclosed semiconductor device includes an electron transit layer; an electron supply layer disposed above the electron transit layer; a source electrode, a drain electrode, and a gate electrode, the source electrode, the drain electrode, and the gate electrode being disposed on the electron supply layer; a first capping layer disposed on the electron supply layer between the gate electrode and the drain electrode; and a negative charge generation layer disposed on the first capping layer, the negative charge generation layer being configured to generate a negative charge.

    SEMICONDUCTOR APPARATUS
    2.
    发明申请

    公开(公告)号:US20140091313A1

    公开(公告)日:2014-04-03

    申请号:US13935821

    申请日:2013-07-05

    申请人: FUJITSU LIMITED

    IPC分类号: H01L29/205

    摘要: A semiconductor apparatus includes a substrate; a buffer layer formed on the substrate; a first semiconductor layer formed on the buffer layer; and a second semiconductor layer formed on the first semiconductor layer. Further, the buffer layer is formed of AlGaN and doped with Fe, the buffer layer includes a plurality of layers having different Al component ratios from each other, and the Al component ratio of a first layer is greater than the Al component ratio of a second layer and a Fe concentration of the first layer is less than the Fe concentration of the second layer, the first and second layers being included in the plurality of layers, and the first layer being formed on a substrate side of the second layer.

    摘要翻译: 一种半导体装置,包括:基板; 形成在所述基板上的缓冲层; 形成在缓冲层上的第一半导体层; 以及形成在所述第一半导体层上的第二半导体层。 此外,缓冲层由AlGaN形成并掺杂Fe,缓冲层包括彼此不同的Al成分比的多个层,第一层的Al成分比大于第二层的Al成分比 所述第一层的Fe浓度小于所述第二层的Fe浓度,所述第一层和所述第二层包含在所述多层中,所述第一层形成在所述第二层的基板侧。

    SEMICONDUCTOR DEVICE
    4.
    发明申请

    公开(公告)号:US20220013642A1

    公开(公告)日:2022-01-13

    申请号:US17209869

    申请日:2021-03-23

    申请人: FUJITSU LIMITED

    摘要: A semiconductor device includes an underlayer made of a first nitride semiconductor, a first buffer layer made of a second nitride semiconductor, provided on the underlayer, and subjected to compressive stress from the underlayer in an in-plane direction which is perpendicular to a thickness direction of the underlayer, a second buffer layer made of a third nitride semiconductor, provided on the first buffer layer, and subjected to compressive stress from the first buffer layer in the in-plane direction, a channel layer made of a fourth nitride semiconductor, provided on the second buffer layer, and subjected to compressive stress from the second buffer layer in the in-plane direction, and a barrier layer made of a fifth nitride semiconductor, and provided above the channel layer.

    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR

    公开(公告)号:US20220069112A1

    公开(公告)日:2022-03-03

    申请号:US17228002

    申请日:2021-04-12

    申请人: FUJITSU LIMITED

    摘要: A semiconductor device includes an AlN substrate, a semiconductor laminated structure, disposed above the substrate, and including an electron transit layer and an electron supply layer made of a nitride semiconductor, respectively, and a gate electrode, a source electrode, and a drain electrode disposed above the electron supply layer. The electron transit layer is located at a lowermost position of the semiconductor laminated structure. The gate electrode has a gate length of 0.3 μm or less, and a ratio of a thickness of the semiconductor laminated structure with respect to the gate length of the gate electrode is 4.0 or less.

    SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD

    公开(公告)号:US20180047840A1

    公开(公告)日:2018-02-15

    申请号:US15791878

    申请日:2017-10-24

    申请人: FUJITSU LIMITED

    摘要: A semiconductor device includes a first semiconductor layer formed of a nitride semiconductor above a substrate, a second semiconductor layer formed of a material including InAlN or InAlGaN above the first semiconductor layer, a third semiconductor layer formed of a material including AlN above the second semiconductor layer, a fourth semiconductor layer formed of a material including GaN above the third semiconductor layer, a gate electrode formed above the fourth semiconductor layer, and a source electrode and a drain electrode formed on any one of the second semiconductor layer, the third semiconductor layer, and the fourth semiconductor layer.