公开(公告)号：US10678005B2

公开(公告)日：2020-06-09

申请号：US16248963

申请日：2019-01-16

Applicant: Elenion Technologies, LLC

Inventor： David Henry Kinghorn ,  Ari Jason Novack ,  Holger N. Klein ,  Nathan A. Nuttall ,  Kishor V. Desai ,  Daniel J. Blumenthal ,  Michael J. Hochberg ,  Ruizhi Shi

IPC: G02B6/42 ,  G02B6/13 ,  G02B6/136 ,  H01L25/00 ,  G02B6/12 ,  H01L25/16 ,  H01L31/12 ,  H01L31/18

Abstract: Two semiconductor chips are optically aligned to form a hybrid semiconductor device. Both chips have optical waveguides and alignment surface positioned at precisely-defined complementary vertical offsets from optical axes of the corresponding waveguides, so that the waveguides are vertically aligned when one of the chips is placed atop the other with their alignment surface abutting each other. The position of the at least one of the alignment surface in a layer stack of its chip is precisely defined by epitaxy. The chips are bonded at offset bonding pads with the alignment surfaces abutting in the absence of bonding material therebetween.

公开(公告)号：US20200057216A1

公开(公告)日：2020-02-20

申请号：US16664985

申请日：2019-10-28

Applicant: Elenion Technologies, LLC

Inventor： Nathan A. Nuttall ,  Daniel J. Blumenthal ,  Ari Novack ,  Holger N. Klein

IPC: G02B6/42 ,  G02B6/30

Abstract: A fiber alignment or “fiberposer” device enables the passive alignment of one or more optical fibers to a photonic integrated circuit (PIC) device using mating hard-stop features etched into the two devices. Accordingly, fiber grooves can be provide separate from the electrical and optical elements, and attached to the PIC with sub-micron accuracy. Fiberposers may also include a hermetic seal for a laser or other device on the PIC. All of these features significantly reduce the typical cost of an actively aligned optical device sealed in an hermetic package.

公开(公告)号：US10222565B2

公开(公告)日：2019-03-05

申请号：US15783263

申请日：2017-10-13

Applicant: Elenion Technologies, LLC

Inventor： David Henry Kinghorn ,  Ari Jason Novack ,  Holger N. Klein ,  Nathan A. Nuttall ,  Kishor V. Desai ,  Daniel J. Blumenthal ,  Michael J. Hochberg ,  Ruizhi Shi

IPC: G02B6/42 ,  G02B6/14 ,  G02B6/13 ,  G02B6/12 ,  G02B6/136 ,  H01L31/12 ,  H01L31/18 ,  H01L25/00 ,  H01L25/16

Abstract: Two semiconductor chips are optically aligned to form a hybrid semiconductor device. Both chips have optical waveguides and alignment surface positioned at precisely-defined complementary vertical offsets from optical axes of the corresponding waveguides, so that the waveguides are vertically aligned when one of the chips is placed atop the other with their alignment surface abutting each other. The position of the at least one of the alignment surface in a layer stack of its chip is precisely defined by epitaxy. The chips are bonded at offset bonding pads with the alignment surfaces abutting in the absence of bonding material therebetween.

公开(公告)号：US10025045B2

公开(公告)日：2018-07-17

申请号：US15467061

申请日：2017-03-23

Applicant: Elenion Technologies, LLC

Inventor： Nathan A. Nuttall ,  Daniel J. Blumenthal ,  Ari Novack ,  Holger N. Klein

IPC: G02B6/42

Abstract: A fiber alignment or “fiberposer” device enables the passive alignment of one or more optical fibers to a photonic integrated circuit (PIC) device using mating hard-stop features etched into the two devices. Accordingly, fiber grooves can be provide separate from the electrical and optical elements, and attached to the PIC with sub-micron accuracy. Fiberposers may also include a hermetic seal for a laser or other device on the PIC. All of these features significantly reduce the typical cost of an actively aligned optical device sealed in an hermetic package.

公开(公告)号：US20170205594A1

公开(公告)日：2017-07-20

申请号：US15467061

申请日：2017-03-23

Applicant: Elenion Technologies, LLC

Inventor： Nathan A. Nuttall ,  Daniel J. Blumenthal ,  Ari Novack ,  Holger N. Klein

IPC: G02B6/42

CPC classification number: G02B6/4242 ,  G02B6/30 ,  G02B6/423 ,  G02B6/4239 ,  G02B6/4243 ,  G02B6/4245 ,  G02B6/4249 ,  G02B6/4253 ,  G02B6/4274 ,  G02B6/428

Abstract: A fiber alignment or “fiberposer” device enables the passive alignment of one or more optical fibers to a photonic integrated circuit (PIC) device using mating hard-stop features etched into the two devices. Accordingly, fiber grooves can be provide separate from the electrical and optical elements, and attached to the PIC with sub-micron accuracy. Fiberposers may also include a hermetic seal for a laser or other device on the PIC. All of these features significantly reduce the typical cost of an actively aligned optical device sealed in an hermetic package.

公开(公告)号：US20190189531A1

公开(公告)日：2019-06-20

申请号：US16250271

申请日：2019-01-17

Applicant: Elenion Technologies, LLC

Inventor： Nathan A. Nuttall

IPC: H01L23/367 ,  H01L23/13 ,  H01L23/373 ,  G02B6/42 ,  G06F1/3234

Abstract: A heat sink for a semiconductor chip device includes cavities in a lower surface thereof for receiving electrical components on a top surface of the semiconductor chip, and a pedestal extending through an opening in the semiconductor chip for contacting electrical components on a bottom surface of the semiconductor chip. A lid may also be provided on the bottom surface of the semiconductor chip for protecting the electrical components and for heat sinking the electrical components to an adjacent device or printed circuit board.

公开(公告)号：US10211121B2

公开(公告)日：2019-02-19

申请号：US15826165

申请日：2017-11-29

Applicant: Elenion Technologies, LLC

Inventor： Nathan A. Nuttall

IPC: H01L23/34 ,  H01L23/367 ,  H01L23/13 ,  H01L25/07 ,  H01L23/552 ,  G02B6/42 ,  H01L23/48 ,  H01L25/16 ,  H01L23/373

Abstract: A heat sink for a semiconductor chip device includes cavities in a lower surface thereof for receiving electrical components on a top surface of the semiconductor chip, and a pedestal extending through an opening in the semiconductor chip for contacting electrical components on a bottom surface of the semiconductor chip. A lid may also be provided on the bottom surface of the semiconductor chip for protecting the electrical components and for heat sinking the electrical components to an adjacent device or printed circuit board.

公开(公告)号：US10748832B2

公开(公告)日：2020-08-18

申请号：US16250271

申请日：2019-01-17

Applicant: Elenion Technologies, LLC

Inventor： Nathan A. Nuttall

IPC: H01L23/367 ,  H01L23/13 ,  H01L25/07 ,  H01L23/552 ,  G02B6/42 ,  H01L25/16 ,  H01L23/373 ,  H01L23/48 ,  G06F1/3234

Abstract: A heat sink for a semiconductor chip device includes cavities in a lower surface thereof for receiving electrical components on a top surface of the semiconductor chip, and a pedestal extending through an opening in the semiconductor chip for contacting electrical components on a bottom surface of the semiconductor chip. A lid may also be provided on the bottom surface of the semiconductor chip for protecting the electrical components and for heat sinking the electrical components to an adjacent device or printed circuit board.

公开(公告)号：US20190179091A1

公开(公告)日：2019-06-13

申请号：US16248963

申请日：2019-01-16

Applicant: Elenion Technologies, LLC

Inventor： David Henry Kinghorn ,  Ari Jason Novack ,  Holger N. Klein ,  Nathan A. Nuttall ,  Kishor V. Desai ,  Daniel J. Blumenthal ,  Michael J. Hochberg ,  Ruizhi Shi

IPC: G02B6/42 ,  G02B6/13 ,  G02B6/136

CPC classification number: G02B6/423 ,  G02B6/131 ,  G02B6/136 ,  G02B6/4232 ,  G02B6/4238 ,  G02B6/4251 ,  G02B6/4268 ,  G02B6/4274 ,  G02B2006/12061 ,  G02B2006/12097 ,  G02B2006/121 ,  H01L25/16 ,  H01L25/162 ,  H01L25/167 ,  H01L25/50 ,  H01L31/125 ,  H01L31/18 ,  Y02P70/521

Abstract: Two semiconductor chips are optically aligned to form a hybrid semiconductor device. Both chips have optical waveguides and alignment surface positioned at precisely-defined complementary vertical offsets from optical axes of the corresponding waveguides, so that the waveguides are vertically aligned when one of the chips is placed atop the other with their alignment surface abutting each other. The position of the at least one of the alignment surface in a layer stack of its chip is precisely defined by epitaxy. The chips are bonded at offset bonding pads with the alignment surfaces abutting in the absence of bonding material therebetween.

公开(公告)号：US20180090410A1

公开(公告)日：2018-03-29

申请号：US15826165

申请日：2017-11-29

Applicant: Elenion Technologies, LLC

Inventor： Nathan A. Nuttall

IPC: H01L23/367 ,  G02B6/42 ,  H01L23/373 ,  H01L25/16 ,  H01L23/48 ,  H01L23/552

CPC classification number: H01L23/3672 ,  G02B6/4243 ,  G02B6/4269 ,  G02B6/4274 ,  H01L23/13 ,  H01L23/3675 ,  H01L23/373 ,  H01L23/3736 ,  H01L23/481 ,  H01L23/552 ,  H01L25/071 ,  H01L25/167

Abstract: A heat sink for a semiconductor chip device includes cavities in a lower surface thereof for receiving electrical components on a top surface of the semiconductor chip, and a pedestal extending through an opening in the semiconductor chip for contacting electrical components on a bottom surface of the semiconductor chip. A lid may also be provided on the bottom surface of the semiconductor chip for protecting the electrical components and for heat sinking the electrical components to an adjacent device or printed circuit board.