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公开(公告)号：US20200096701A1
公开(公告)日：2020-03-26
申请号：US16681941
申请日：2019-11-13
Applicant: Elenion Technologies, LLC
Inventor： Ari Novack , Ruizhi Shi , Alexandre Horth , Ran Ding , Michael J. Hochberg
Abstract: A photonic chip includes a device layer and a port layer, with an optical port located at the port layer. Inter-layer optical couplers are provided for coupling light between the device and port layers. The inter-layer couplers may be configured to couple signal light but block pump light or other undesired wavelength from entering the device layer, operating as an input filter. The port layer may accommodate other light pre-processing functions, such as optical power splitting, that are undesirable in the device layer.
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公开(公告)号：US20200057216A1
公开(公告)日：2020-02-20
申请号：US16664985
申请日：2019-10-28
Applicant: Elenion Technologies, LLC
Inventor： Nathan A. Nuttall , Daniel J. Blumenthal , Ari Novack , Holger N. Klein
Abstract: A fiber alignment or “fiberposer” device enables the passive alignment of one or more optical fibers to a photonic integrated circuit (PIC) device using mating hard-stop features etched into the two devices. Accordingly, fiber grooves can be provide separate from the electrical and optical elements, and attached to the PIC with sub-micron accuracy. Fiberposers may also include a hermetic seal for a laser or other device on the PIC. All of these features significantly reduce the typical cost of an actively aligned optical device sealed in an hermetic package.
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公开(公告)号：US10444451B2
公开(公告)日：2019-10-15
申请号：US16238692
申请日：2019-01-03
Applicant: Elenion Technologies, LLC
Inventor： Ruizhi Shi , Yang Liu , Ari Novack , Yangjin Ma , Kishore Padmaraju , Michael J. Hochberg
Abstract: A light shield may be formed in photonic integrated circuit between integrated optical devices of the photonic integrated circuit. The light shield may be built by using materials already present in the photonic integrated circuit, for example the light shield may include metal walls and doped semiconductor regions. Light-emitting or light-sensitive integrated optical devices or modules of a photonic integrated circuit may be constructed with light shields integrally built in.
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公开(公告)号：US20190293866A1
公开(公告)日：2019-09-26
申请号：US16439196
申请日：2019-06-12
Applicant: Elenion Technologies, LLC
Inventor： Ari Novack , Matthew Akio Streshinsky , Michael J. Hochberg
IPC: G02B6/124 , G02B6/12 , G01R31/308 , G02B6/13 , H01L21/66
Abstract: A qualification apparatus for a photonic chip on a wafer that leaves undisturbed an edge coupler that provides an operating port for the photonic devices or circuits on the chip during normal operation in order to not introduce extra loss in the optical path of the final circuit. The qualification apparatus provides an optical path that is angled with regard to the surface of the chip, for example by using a grating coupler. The qualification apparatus can be removed after the chip is qualified. Optionally, the qualification apparatus can be left in communication with the chip and optionally employed as an input port for the chip after the chip has been separated from other chips on a common substrate.
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公开(公告)号：US10411149B2
公开(公告)日：2019-09-10
申请号：US16168249
申请日：2018-10-23
Applicant: Elenion Technologies, LLC
Inventor： Ari Novack , Yang Liu , Yi Zhang
IPC: H01L31/107 , H01L31/028 , H01L31/0352 , H01L31/0232 , H01L31/18
Abstract: A lateral Ge/Si APD constructed on a silicon-on-insulator wafer includes a silicon device layer having regions that are doped to provide a lateral electric field and an avalanche region. A region having a modest doping level is in contact with a germanium body. There are no metal contacts made to the germanium body. The electrical contacts to the germanium body are made by way of the doped regions in the silicon device layer.
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Patent Agency Ranking
公开(公告)号：US20190089465A1
公开(公告)日：2019-03-21
申请号：US16135950
申请日：2018-09-19
Applicant: Elenion Technologies, LLC
Inventor： Matthew Akio Streshinsky , Ran Ding , Yang Liu , Ari Novack , Michael Hochberg , Alex Rylyakov
Abstract: A skew compensation apparatus and method. In an optical system that uses optical signals, skew may be generated as the optical signals are processed from an input optical signal to at least two electrical signals representative of the phase-differentiated optical signals. A compensation of the skew is provided by including an optical delay line in the path of the optical signal that does not suffer the skew (e.g., that serves as the time base for the skew measurement). The optical delay line introduces a delay Tskew equal to the delay suffered by the optical signal that is not taken as the time base. The two signals are thereby corrected for skew.
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公开(公告)号：US20180102447A1
公开(公告)日：2018-04-12
申请号：US15724458
申请日：2017-10-04
Applicant: Elenion Technologies, LLC
Inventor： Thomas Wetteland Baehr-Jones , Yi Zhang , Michael J. Hochberg , Ari Novack
IPC: H01L31/0352 , H01L31/18 , H01L31/107 , H01L31/028
CPC classification number: H01L31/0352 , H01L27/14638 , H01L27/14649 , H01L27/14685 , H01L27/14698 , H01L31/0256 , H01L31/028 , H01L31/105 , H01L31/107 , H01L31/1808 , Y02E10/547
Abstract: A Ge-on-Si photodetector constructed without doping or contacting Germanium by metal is described. Despite the simplified fabrication process, the device has responsivity of 1.24 A/W, corresponding to 99.2% quantum efficiency. Dark current is 40 nA at −4 V reverse bias. 3-dB bandwidth is 30 GHz.
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8.发明申请公开(公告)号：US20200225168A1
公开(公告)日：2020-07-16
申请号：US16830399
申请日：2020-03-26
Applicant: Elenion Technologies, LLC
Inventor： Matthew Akio Streshinsky , Ari Novack , Michael J. Hochberg
IPC: G01N21/88 , G01R31/311 , G01B11/30 , H01L21/66
Abstract: A test system for determining a surface characteristic of a chip facet comprises a chip, which has a facet and includes a waveguide, a detector, and a processor. The on-chip waveguide is configured to direct test light towards the facet, where a portion of the test light is reflected and a portion of the test light is transmitted. The detector is configured to measure an amount of the reflected portion or the transmitted portion, and the processor is configured to determine a surface characteristic of the facet, such as a facet angle, a facet curvature, and/or a facet roughness, on the basis of the measured amount.
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公开(公告)号：US20180342411A1
公开(公告)日：2018-11-29
申请号：US16037871
申请日：2018-07-17
Applicant: Elenion Technologies, LLC
Inventor： Noam Ophir , Xiaoliang Zhu , Ari Novack , Michael J. Hochberg
IPC: H01L21/67 , H01L23/544
Abstract: Otherwise-unused metal pads are utilized for mechanically marking an identification number on each chip in each reticle of each semiconductor wafer. A chip-specific marking pattern is scribed into selected metal pads using a standard commercial wafer probe controlled by a custom-built controller to direct the probe or probe stage to implement the pattern. Visual inspection (manual and automated) may then be used for die identification based on the probe-marked pattern, including incorporating the visual inspection of these pads into the product building process.
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公开(公告)号：US20180269091A1
公开(公告)日：2018-09-20
申请号：US15460335
申请日：2017-03-16
Applicant: Elenion Technologies, LLC
Inventor： Noam Ophir , Xiaoliang Zhu , Ari Novack , Michael J. Hochberg
IPC: H01L21/67 , H01L23/544
CPC classification number: H01L21/67294 , H01L23/544 , H01L2223/54413 , H01L2223/54433 , H01L2223/54486
Abstract: Otherwise-unused metal pads are utilized for mechanically marking an identification number on each chip in each reticle of each semiconductor wafer. A chip-specific marking pattern is scribed into selected metal pads using a standard commercial wafer probe controlled by a custom-built controller to direct the probe or probe stage to implement the pattern. Visual inspection (manual and automated) may then be used for die identification based on the probe-marked pattern, including incorporating the visual inspection of these pads into the product building process.
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