公开(公告)号：US06788091B1

公开(公告)日：2004-09-07

申请号：US09993015

申请日：2001-11-05

Applicant: David M. Weber

Inventor： David M. Weber

IPC: G01R1512

CPC classification number: G01R31/2856

Abstract: A mechanism if provided for testing newly-manufactured integrated circuits at the wafer stage. Built-in self-test circuitry is used to test each of the die on a wafer in parallel. Then, when a defect is detected, the die marks itself (e.g., by physically destroying a portion of itself through burnout). The present mechanism eliminates the inefficiencies of serial testing of die and of mechanical latency as each die is positioned for testing.

Abstract translation: 提供用于在晶片台测试新制造的集成电路的机构。 内置自检电路用于对晶片上的每个晶片进行并行测试。 然后，当检测到缺陷时，模具自身（例如，通过倦怠物理地破坏其自身的一部分）。 目前的机制消除了每个管芯定位用于测试的芯片的串行测试和机械延迟的低效率。

公开(公告)号：US06570853B1

公开(公告)日：2003-05-27

申请号：US09679506

申请日：2000-10-04

Applicant: Stephen M. Johnson ,  Timothy E. Hoglund ,  David M. Weber ,  John M. Adams ,  Mark A. Reber

Inventor： Stephen M. Johnson ,  Timothy E. Hoglund ,  David M. Weber ,  John M. Adams ,  Mark A. Reber

IPC: H04L1228

CPC classification number: H04L47/39 ,  H04L47/10 ,  H04L47/286 ,  H04L47/30 ,  H04L67/1097

Abstract: A method and apparatus in a source node for transmitting data to a target node. Responsive to a request to transmit data to the target node, a determination is made as to whether a selected period of time has passed without data transmitted from the source node being received by the target node. Responsive to detecting the selected period of time has passed without data transmitted from the source node being received by the target node, a determination is made as to whether space is available in the target node to receive the data. Responsive to a determination that space is unavailable in the target node, generating an indication that the target node is blocked is generated.

Abstract translation: 源节点中用于向目标节点发送数据的方法和装置。 响应于向目标节点发送数据的请求，确定是否已经过去了所选择的时间段，而没有从源节点发送的数据被目标节点接收。 响应于检测所选择的时间段已经过去，没有从目标节点接收到的源节点发送的数据，确定目标节点中的空间是否可用于接收数据。 响应于确定目标节点中的空间不可用，生成目标节点被阻止的指示。

公开(公告)号：US06274395B1

公开(公告)日：2001-08-14

申请号：US09471842

申请日：1999-12-23

Applicant: David M. Weber

Inventor： David M. Weber

IPC: G01R3126

CPC classification number: H01L23/544 ,  G01R31/2831 ,  G01R31/318505 ,  G01R31/318511 ,  H01L2223/54473 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of fabricating a semiconductor wafer includes the step of fabricating a number of die on the wafer. The method also includes the step of fabricating a memory device on the wafer. The method further includes the step of testing the number of die with a die testing apparatus so as to obtain test data associated with the number of die. In addition, the method includes the step of storing the test data obtained during the testing step in the memory device. Moreover, the method includes the step of retrieving the test data from the memory device. Yet further, the method includes the step of operating a packaging apparatus so as to package a first die of the number of die based on the test data. A semiconductor wafer is also disclosed.

Abstract translation: 制造半导体晶片的方法包括在晶片上制造多个管芯的步骤。 该方法还包括在晶片上制造存储器件的步骤。 该方法还包括用模具测试装置测试模具数量以获得与模具数量相关联的测试数据的步骤。 此外，该方法包括将在测试步骤期间获得的测试数据存储在存储器件中的步骤。 此外，该方法包括从存储器件检索测试数据的步骤。 此外，该方法包括操作包装设备以便基于测试数据封装多个管芯的第一管芯的步骤。 还公开了半导体晶片。

公开(公告)号：US5777987A

公开(公告)日：1998-07-07

申请号：US580947

申请日：1995-12-29

Applicant: John M. Adams ,  Timothy E. Hoglund ,  Stephen M. Johnson ,  Mark A. Reber ,  David M. Weber

Inventor： John M. Adams ,  Timothy E. Hoglund ,  Stephen M. Johnson ,  Mark A. Reber ,  David M. Weber

IPC: H04L29/02 ,  H04L12/56 ,  H04J3/00

CPC classification number: H04L47/30 ,  H04L47/10 ,  H04L47/26

Abstract: A method and associated apparatus for using a primary FIFO and one or more secondary FIFOs in parallel to simplify flow control and routing in packet communication operations wherein at least one FIFO (buffer) is associated with each of a plurality of receiving nodes or components within a receiving node. The present invention applies received packets simultaneously to a primary FIFO and to all associated secondary FIFOs in the receiver of a packet communications link. After receipt of a packet, the packet is removed from any secondary FIFOs which correspond to receiver nodes or components to which the packet was not routed. For all receiving nodes or components to which the packet was routed, if the packet was stored in each associated secondary FIFO without overflow, then the packet is also purged from the primary FIFO. If any secondary FIFO overflowed by storage of the received packet, then the packet is purged from the overflowed FIFO and the packet remains stored in the primary FIFO for further processing. Flow control signals are generated and applied to the transmitting source as required in accordance with the status of the primary FIFO. The secondary FIFOs are not directly relevant to flow control logic. The receiving component corresponding to each secondary FIFO locates the next packet for processing by inspecting the associated secondary FIFO as well as the primary FIFO if the secondary FIFO overflowed. These methods and apparatus simplify flow control and routing control in packetized communication receivers.

Abstract translation: 一种用于并行地使用主FIFO和一个或多个辅助FIFO以简化在分组通信操作中的流控制和路由的方法和相关联的装置，其中至少一个FIFO（缓冲器）与多个接收节点中的每一个相关联， 接收节点。 本发明将接收到的分组同时应用于主FIFO和分组通信链路的接收机中的所有相关联的辅助FIFO。 在接收到分组之后，从与分组未被路由到的接收机节点或组件对应的任何辅助FIFO中移除分组。 对于分组路由到的所有接收节点或组件，如果分组存储在每个相关联的辅助FIFO中，而不会溢出，则该分组也从主FIFO中清除。 如果任何辅助FIFO通过存储接收的分组溢出，则从溢出的FIFO中清除分组，并且分组保持存储在主FIFO中用于进一步处理。 根据主FIFO的状态，根据需要生成流量控制信号并将其应用于发送源。 二级FIFO与流量控制逻辑不直接相关。 对应于每个辅助FIFO的接收组件通过检查相关联的辅助FIFO以及主FIFO溢出时定位下一个数据包进行处理。 这些方法和装置简化了分组通信接收机中的流量控制和路由控制。

公开(公告)号：US6080571A

公开(公告)日：2000-06-27

申请号：US842702

申请日：1997-04-15

Applicant: Christopher P. Prior ,  David M. Weber ,  Richard S. Gore ,  James J. Harter

Inventor： Christopher P. Prior ,  David M. Weber ,  Richard S. Gore ,  James J. Harter

IPC: C07K14/15 ,  C07K14/16 ,  C12M3/00 ,  C12N5/02 ,  C12N7/02

CPC classification number: C12N7/00 ,  C07K14/005 ,  C12N2740/16022 ,  C12N2740/16051 ,  C12N2740/16122

Abstract: This invention is directed to a continuous process for producing viral particles comprising providing in a perfused growth medium a population of viable virally infected non-lytic cells, and removing medium containing said cells at a rate to maintain the steady-state log-phase growth of cells remaining in said perfused growth medium. The invention is also directed to a process for purifying retroviral particles comprising passing a solution comprising the retroviral particles and contaminants through an anion exchange resin, and eluting the retroviral particles from the resin.

Abstract translation: 本发明涉及用于生产病毒颗粒的连续方法，其包括在灌注的生长培养基中提供存活的病毒感染的非溶解细胞群，以及以保持稳态对数期生长的速率除去含有所述细胞的培养基 剩余在所述灌注生长培养基中的细胞。 本发明还涉及用于纯化逆转录病毒颗粒的方法，包括使包含逆转录病毒颗粒和污染物的溶液通过阴离子交换树脂，并从树脂中洗脱逆转录病毒颗粒。

公开(公告)号：US5761424A

公开(公告)日：1998-06-02

申请号：US580955

申请日：1995-12-29

Applicant: John M. Adams ,  Timothy E. Hoglund ,  Stephen M. Johnson ,  Mark A. Reber ,  David M. Weber

Inventor： John M. Adams ,  Timothy E. Hoglund ,  Stephen M. Johnson ,  Mark A. Reber ,  David M. Weber

IPC: H04L12/56 ,  G06F15/17 ,  H04L29/06 ,  G06F15/16

CPC classification number: H04L29/06 ,  G06F15/17

Abstract: A method and associated apparatus for automating the filtration and generation of information in a packetized communication system. A filtration table includes entries used in recognizing a valid packet received at a node in a communication system. A mask field in each entry is applied to appropriate fields in the packet (e.g. the ordered set as applied to Fibre Channel communication systems) to determine the validity of the packet with regard to the receiving node. Rules in a field of each entry further qualify the recognition of a received packet (e.g. ordered set) by testing the reception of the packet against other logical rules. Action fields in each record permit definition of actions to be invoked automatically (e.g. automatic adjustment of fill transmissions in Fibre Channel applications) in response to receipt and recognition of a particular packet. The set of packets recognized by the receiving node may be modified by adding, deleting, or modifying the entries in the filtration table. The programmable filtration thereby permits simple modifications to the protocol supported by the receiving node. Programmable generation capabilities of the present invention permit rapid integration of additional packets (e.g. ordered sets) transmitted in response to perceived packets in the receiving node. Programmable parameters in the receiving node permit automatic generation and transmission of packets in accordance with the parameter settings at the time of packet transmission.

Abstract translation: 一种用于在分组化通信系统中自动化过滤和生成信息的方法和相关联的装置。 过滤表包括用于识别在通信系统中的节点处接收的有效分组的条目。 每个条目中的掩码字段被应用于分组中的适当字段（例如应用于光纤通道通信系统的有序集合），以确定分组关于接收节点的有效性。 通过根据其他逻辑规则测试分组的接收，每个条目的字段中的规则进一步限定了对接收到的分组（例如，有序集合）的识别。 每个记录中的动作字段允许响应于对特定分组的接收和识别而自动调用的动作的定义（例如，在光纤通道应用中自动调整填充传输）。 可以通过添加，删除或修改过滤表中的条目来修改由接收节点识别的分组集合。 可编程过滤因此允许对接收节点支持的协议的简单修改。 本发明的可编程生成能力允许快速集成响应于接收节点中的感知分组而发送的附加分组（例如有序集合）。 接收节点中的可编程参数允许根据分组传输时的参数设置自动生成和传输分组。

公开(公告)号：US5204627A

公开(公告)日：1993-04-20

申请号：US669143

申请日：1991-03-14

Applicant: Charles A. Mistretta ,  Frank R. Korosec ,  David M. Weber

Inventor： Charles A. Mistretta ,  Frank R. Korosec ,  David M. Weber

IPC: G01R33/56 ,  G01R33/563

CPC classification number: G01R33/563 ,  G01R33/56

Abstract: A magnetic resonance angiogram is produced by projecting a 3D array of motion sensitized NMR data. A mask which locates the vessels in the 3D array is produced by thresholding the NMR data, and this mask is combined with the 3D NMR data set to exclude signals produced by surrounding stationary tissues. An integration projection technique is used to produce the angiogram from the masked data set.

Abstract translation: 通过投影运动敏化NMR数据的3D阵列产生磁共振血管造影。 通过对NMR数据进行阈值产生定位3D阵列中的血管的掩模，并将该掩模与3D NMR数据组合以排除由周围的静止组织产生的信号。 使用积分投影技术从掩蔽的数据集中产生血管造影。

公开(公告)号：US06185620B2

公开(公告)日：2001-02-06

申请号：US09054849

申请日：1998-04-03

Applicant: David M. Weber ,  Timothy E. Hoglund ,  Stephen M. Johnson ,  John M. Adams ,  Mark A. Reber

Inventor： David M. Weber ,  Timothy E. Hoglund ,  Stephen M. Johnson ,  John M. Adams ,  Mark A. Reber

IPC: G06F1100

CPC classification number: H04L49/901 ,  H04L29/06 ,  H04L49/90 ,  H04L49/9031 ,  H04L69/12

Abstract: A method and apparatus for transferring data from a host to a node through a fabric connecting the host to the node. A chip architecture is provided in which a protocol engine provides for on ship processing in transferring data such that frequent interrupts from various components within the chip may be processed without intervention from the host processor. Additionally, context managers are provided to transmit and receive data. The protocol engine creates a list of transmit activities, which is traversed by the context managers, which in turn execute the listed activity in a fashion independent from the protocol engine. In receiving data, the context managers provide a mechanism to process frames of data originating from various sources without requiring intervention from the protocol engine. When receiving data, the context managers are able to process frames from different sources, which arrive out of order. Additionally, the context managers also determine when all frames within a sequence have been received. A link control unit is provided in which loop management is provided when the host is connected to a loop. Management of the loop includes implementing mechanisms to initiate acquisition of the loop and initiate a release of the loop in response to conditions in which data is received and transmitted by the host and by other nodes on the loop.

Abstract translation: 一种用于通过将主机连接到节点的结构将数据从主机传送到节点的方法和装置。 提供了一种芯片架构，其中协议引擎提供用于传送数据的船舶处理，使得来自芯片中的各种组件的频繁中断可以被处理而无需主机处理器的干预。 另外，提供上下文管理器来发送和接收数据。 协议引擎创建传输活动的列表，该列表由上下文管理器遍历，后者又以独立于协议引擎的方式执行列出的活动。 在接收数据时，上下文管理器提供一种机制来处理来自各种源的数据帧，而不需要来自协议引擎的干预。 当接收到数据时，上下文管理器能够处理来自不同来源的帧，这些帧到达无序。 另外，上下文管理器还确定序列中的所有帧何时已被接收。 提供了一种链路控制单元，其中当主机连接到环路时，提供循环管理。 循环的管理包括执行机制以启动循环的获取并且响应于由主机和循环中的其他节点接收和发送数据的条件来启动循环的释放。

公开(公告)号：US6134617A

公开(公告)日：2000-10-17

申请号：US54850

申请日：1998-04-03

Applicant: David M. Weber

Inventor： David M. Weber

IPC: H04L12/861 ,  H04L12/879 ,  H04L29/06 ,  G06F13/00

CPC classification number: H04L49/9047 ,  H04L29/06 ,  H04L49/90 ,  H04L49/901 ,  H04L69/12

Abstract: A method and apparatus for transferring data from a host to a node through a fabric connecting the host to the node. A chip architecture is provided in which a protocol engine provides for on chip processing in transferring data such that frequent interrupts from various components within the chip may be processed without intervention from the host processor. Additionally, context managers are provided to transmit and receive data. The protocol engine creates a list of transmit activities, which is traversed by the context managers, which in turn execute the listed activity in a fashion independent from the protocol engine. In receiving data, the context managers provide a mechanism to process frames of data originating from various sources without requiring intervention from the protocol engine. When receiving data, the context managers are able to process frames from different sources, which arrive out of order. Additionally, the context managers also determine when all frames within a sequence have been received. A link control unit is provided in which loop management is provided when the host is connected to a loop. Management of the loop includes implementing mechanisms to initiate acquisition of the loop and initiate a release of the loop in response to conditions in which data is received and transmitted by the host and by other nodes on the loop.

Abstract translation: 一种用于通过将主机连接到节点的结构将数据从主机传输到节点的方法和装置。 提供了一种芯片架构，其中协议引擎提供用于传输数据的片上处理，使得来自芯片内的各种组件的频繁中断可以被处理而无需主机处理器的干预。 另外，提供上下文管理器来发送和接收数据。 协议引擎创建传输活动的列表，该列表由上下文管理器遍历，后者又以独立于协议引擎的方式执行列出的活动。 在接收数据时，上下文管理器提供一种机制来处理来自各种源的数据帧，而不需要来自协议引擎的干预。 当接收到数据时，上下文管理器能够处理来自不同来源的帧，这些帧到达无序。 另外，上下文管理器还确定序列中的所有帧何时已被接收。 提供了一种链路控制单元，其中当主机连接到环路时，提供循环管理。 循环的管理包括执行机制以启动循环的获取并且响应于由主机和循环中的其他节点接收和发送数据的条件来启动循环的释放。

公开(公告)号：US6097775A

公开(公告)日：2000-08-01

申请号：US024919

申请日：1998-02-17

Applicant: David M. Weber

Inventor： David M. Weber

IPC: G06F5/06 ,  H04L7/00 ,  H04L7/02 ,  G06F9/445 ,  H04L13/10

CPC classification number: H04L7/02 ,  G06F5/06 ,  H04L7/0008

Abstract: A method and apparatus of a synchronizer circuit for transferring signals between two clock domains in which a first synchronizer unit and a second synchronizer unit form a hand-shaking protocol. In particular, an input event from a source clock domain is captured in an input unit and a first signal is asserted indicating that the input signal is to be transferred to a target clock domain. This first signal is synchronized to the clock signal in the target clock domain at the first synchronizer unit, causing assertion of a second signal. The second signal is coupled to an output unit which generates an output event signal for a single clock period.

Abstract translation: 一种用于在两个时钟域之间传送信号的同步器电路的方法和装置，其中第一同步器单元和第二同步器单元形成手抖动协议。 特别地，来自源时钟域的输入事件被捕获在输入单元中，并且第一信号被断言，指示输入信号要传送到目标时钟域。 该第一信号与第一同步器单元中的目标时钟域中的时钟信号同步，导致第二信号的断言。 第二信号耦合到输出单元，其在单个时钟周期内产生输出事件信号。