Rack and pinion gear assembly
    1.
    发明授权
    Rack and pinion gear assembly 失效
    机架和小齿轮组件

    公开(公告)号:US4218933A

    公开(公告)日:1980-08-26

    申请号:US949814

    申请日:1978-10-10

    摘要: A rack and pinion gear assembly 10 (FIG. 1) includes a resilient bushing which urges the rack into meshing engagement with the pinion. An arcuate inside bearing surface 54 (FIG. 4) of the bushing 18 has a larger radius of curvature than the curved outside surface 52 of the rack 12 against which it bears. The rack thus makes tangent contact with the bushing 18. When one portion of the bushing 18 is worn and therefore excessive play appears in the steering gear assembly 10, the bushing may be removed from the housing 16 of the assembly and rotated 180.degree. and then reinserted into the housing to thereby provide an unworn bearing surface which slidably engages the rack 12. The bushing 18 includes a plurality of axially extending grooves 70, 72, 74, and 76 through which lubricant is supplied to the bearing surfaces 52 and 54. In a second embodiment (FIG. 5) the aperture 50b in the bushing 18b through which the rack 12b extends has a square cross section and is in tangent contact with the rack at two locations 84 and 86. In a third embodiment (FIG. 3) the aperture 50c in the bushing through which the rack 12c extends is composed of four arcuate segments 100, 102, 104, and 106 each having the same radius of curvature, and each having a different center of curvature 110, 112, 114, and 116, respectively. This provides tangent contact between the rack 12c and the bushing 18c at two axially extending areas 120 and 122.

    摘要翻译: 齿条和小齿轮组件10(图1)包括弹性衬套,其将齿条推向与小齿轮啮合。 衬套18的弓形内部支承表面54(图4)具有比其承载的齿条12的弯曲外表面52更大的曲率半径。 因此,齿条因此与衬套18切线接触。当衬套18的一部分被磨损并且因此在转向齿轮组件10中出现过度的作用时,衬套可以从组件的壳体16移除并旋转180度然后 重新插入到壳体中,从而提供可滑动地接合齿条12的未被磨损的支承表面。套管18包括多个轴向延伸的凹槽70,72,74和76,润滑剂通过该凹槽供应到支承表面52和54。 第二实施例(图5),齿条12b延伸穿过的衬套18b中的孔50b具有正方形横截面并且在两个位置84和86处与齿条正切接触。在第三实施例(图3)中, 齿条12c延伸穿过的衬套中的孔50c由四个弧形段100,102,104和106组成,每个弧形段具有相同的曲率半径,并且每个具有不同的曲率中心110,112,114和116 ,res 果断地 这在两个轴向延伸的区域120和122处提供了齿条12c和衬套18c之间的切线接触。

    METHOD FOR PROVIDING USER FEEDBACK TO CONTENT PROVIDER DURING DELAYED PLAYBACK MEDIA FILES ON PORTABLE PLAYER
    2.
    发明申请
    METHOD FOR PROVIDING USER FEEDBACK TO CONTENT PROVIDER DURING DELAYED PLAYBACK MEDIA FILES ON PORTABLE PLAYER 审中-公开
    在延迟播放媒体上提供用户反馈给内容提供者的方法在便携式播放器上

    公开(公告)号:US20090006524A1

    公开(公告)日:2009-01-01

    申请号:US11768483

    申请日:2007-06-26

    申请人: David H. Allen

    发明人: David H. Allen

    IPC分类号: G06F15/16

    CPC分类号: G06Q30/02

    摘要: A computer program product stored on machine readable media including machine readable instructions for collecting input of a user from a personal media player, the product having instructions for playing a data file using the personal media player; recording the input on the personal media player; and transmitting the input to a processing system. Also disclosed is a computer program product for receiving input from a personal media player; and transmitting the input to the another party.

    摘要翻译: 一种存储在机器可读介质上的计算机程序产品,包括用于从个人媒体播放器收集用户的输入的机器可读指令,该产品具有使用个人媒体播放器播放数据文件的指令; 在个人媒体播放器上记录输入; 以及将输入传送到处理系统。 还公开了一种用于从个人媒体播放器接收输入的计算机程序产品; 并将输入发送到另一方。

    Data communication method using identification protocol
    3.
    发明授权
    Data communication method using identification protocol 失效
    数据通信方法采用识别协议

    公开(公告)号:US5627544A

    公开(公告)日:1997-05-06

    申请号:US619274

    申请日:1996-03-18

    摘要: A protocol is used to coordinate the use of a common communication medium by one or more interrogating commander stations and an unknown plurality of responding responder stations. Each commander station and each responder station is equipped to broadcast messages and to check for error in received messages. When more than one station attempts to broadcast simultaneously, an erroneous message is received and communication is interrupted. To establish uninterrupted communication, a commander station broadcasts a command causing each responder station of a potentially large first number of responder stations to each select a random number from a known range and retain it as its arbitration number. After receipt of such a command, each addressed responder station transmits a response message containing its arbitration number. Zero, one, or several responses may occur simultaneously. By broadcasting requests for identification to various subsets of the full range of arbitration numbers and checking for an immediate error-free response, a commander station can determine the arbitration number of every responder station capable of communicating at the time. Consequently, a commander station can conduct subsequent uninterrupted communication with each responder station, for example by addressing only one responder station. Responder stations of this invention require minimal logic and circuitry to respond to multiple commander stations.

    摘要翻译: 协议用于协调由一个或多个询问指挥员站和未知的多个响应响应站的公共通信介质的使用。 每个指挥台和每个响应站都配备了广播消息并检查收到的消息中的错误。 当多个站尝试同时广播时,接收到错误的消息并中断通信。 为了建立不间断的通信,指挥台广播一个命令,使每个响应者站的潜在的大的第一个响应站的每一个都从一个已知的范围中选出一个随机数,并将其保留为其仲裁号。 在接收到这样的命令之后,每个寻址响应站发送包含其仲裁号的响应消息。 零,一个或几个响应可能同时发生。 通过向全方位仲裁号码的各种子集广播识别请求,并立即检查无误差的响应,指挥台可以确定当时能够进行通信的每个响应者站的仲裁号码。 因此,指挥台可以进行与每个应答者站的后续的不间断的通信,例如通过仅寻址一个应答站。 本发明的响应站要求最小的逻辑和电路来响应多个指挥台。

    Separate variable power supply to on-chip memory using existing power supplies
    5.
    发明授权
    Separate variable power supply to on-chip memory using existing power supplies 有权
    使用现有的电源将单独的可变电源供应到片上存储器

    公开(公告)号:US07170811B1

    公开(公告)日:2007-01-30

    申请号:US11216388

    申请日:2005-08-31

    申请人: David H. Allen

    发明人: David H. Allen

    IPC分类号: G11C5/14

    CPC分类号: G11C5/147

    摘要: A power supply for on-chip memory on an integrated circuit powered by a voltage source includes an on-chip logic circuit, a voltage identification bus and an on-chip variable voltage regulator. The on-chip logic circuit receives power from an off-chip variable power supply and generates a voltage identification signal that provides control information regarding a desired current state of the off-chip variable power supply. The voltage identification bus receives the voltage identification signal from the on-chip logic circuit. The on-chip variable voltage regulator receives power from the voltage source. The on-chip voltage regulator is controlled by an on-chip voltage regulator control logic circuit that is in communication with the voltage identification bus. The on-chip voltage regulator control logic circuit is responsive to the voltage identification signal and causes the on-chip variable voltage regulator to supply an array voltage to an array that tracks the current state of the off-chip variable power supply.

    摘要翻译: 由电压源供电的集成电路上的片上存储器的电源包括片上逻辑电路,电压识别总线和片上可变电压调节器。 片上逻辑电路从片外可变电源接收电力,并产生电压识别信号,该电压识别信号提供关于片外可变电源的期望的当前状态的控制信息。 电压识别总线从片上逻辑电路接收电压识别信号。 片上可变电压调节器从电压源接收电力。 片上稳压器由与电压识别总线通信的片上稳压器控制逻辑电路控制。 片上稳压器控制逻辑电路响应于电压识别信号,并使片上可变电压调节器将阵列电压提供给跟踪片外可变电源的当前状态的阵列。

    Data communication method using identification protocol
    6.
    发明授权
    Data communication method using identification protocol 失效
    数据通信方法采用识别协议

    公开(公告)号:US5500650A

    公开(公告)日:1996-03-19

    申请号:US990915

    申请日:1992-12-15

    摘要: A protocol is used to coordinate the use of a common communication medium by one or more interrogating commander stations and an unknown plurality of responding responder stations. Each commander station and each responder station is equipped to broadcast messages and to check for error in received messages. When more than one station attempts to broadcast simultaneously, an erroneous message is received and communication is interrupted. To establish uninterrupted communication, a commander station broadcasts a command causing each responder station of a potentially large first number of responder stations to each select a random number from a known range and retain it as its arbitration number. After receipt of such a command, each addressed responder station transmits a response message containing its arbitration number. Zero, one, or several responses may occur simultaneously. By broadcasting requests for identification to various subsets of the full range of arbitration numbers and checking for an immediate error-free response, a commander station can determine the arbitration number of every responder station capable of communicating at the time. Consequently, a commander station can conduct subsequent uninterrupted communication with each responder station, for example by addressing only one responder station. Responder stations of this invention require minimal logic and circuitry to respond to multiple commander stations.

    摘要翻译: 协议用于协调由一个或多个询问指挥员站和未知的多个响应响应站的公共通信介质的使用。 每个指挥台和每个响应站都配备了广播消息并检查收到的消息中的错误。 当多个站尝试同时广播时,接收到错误的消息并中断通信。 为了建立不间断的通信,指挥台广播一个命令,使每个响应者站的潜在的大的第一个响应站的每一个都从一个已知的范围中选出一个随机数,并将其保留为其仲裁号。 在接收到这样的命令之后,每个寻址响应站发送包含其仲裁号的响应消息。 零,一个或几个响应可能同时发生。 通过向全方位仲裁号码的各种子集广播识别请求,并立即检查无误差的响应,指挥台可以确定当时能够进行通信的每个响应者站的仲裁号码。 因此,指挥台可以进行与每个应答者站的后续的不间断的通信,例如通过仅寻址一个应答站。 本发明的响应站要求最小的逻辑和电路来响应多个指挥台。

    Power supply current spike reduction techniques for an integrated circuit
    7.
    发明授权
    Power supply current spike reduction techniques for an integrated circuit 失效
    用于集成电路的电源电流尖峰抑制技术

    公开(公告)号:US07954000B2

    公开(公告)日:2011-05-31

    申请号:US12013928

    申请日:2008-01-14

    IPC分类号: G06F1/08

    CPC分类号: G06F1/10

    摘要: An integrated circuit includes a first clock island, a second clock island, a clock generator, and a first programmable delay element. The first clock island is configured to receive a first clock signal. The second clock island is configured to receive a second clock signal. The clock generator is configured to provide a generated clock signal and the first and second clock signals are based on the generated clock signal. The first programmable delay element is coupled between the clock generator and the first clock island. The first programmable delay element is configured to receive the generated clock signal and provide the first clock signal. The integrated circuit is configured to account for a clock skew between the first and second clock signals when information is transferred between the first and second clock islands. In this manner, a predetermined amount of the clock skew may be introduced between the first and second clock signals to smear out, over time, instantaneous power supply current demands of respective logic within the first and second clock islands.

    摘要翻译: 集成电路包括第一时钟岛,第二时钟岛,时钟发生器和第一可编程延迟元件。 第一时钟岛被配置为接收第一时钟信号。 第二时钟岛被配置为接收第二时钟信号。 时钟发生器被配置为提供生成的时钟信号,并且第一和第二时钟信号基于所生成的时钟信号。 第一可编程延迟元件耦合在时钟发生器和第一时钟岛之间。 第一可编程延迟元件被配置为接收生成的时钟信号并提供第一时钟信号。 当信息在第一和第二时钟岛之间传送时,集成电路被配置为考虑第一和第二时钟信号之间的时钟偏移。 以这种方式,可以在第一和第二时钟信号之间引入预定量的时钟偏差,以随着时间推移在第一和第二时钟岛内的相应逻辑的瞬时电源电流需求。

    Method and apparatus to monitor circuit variation effects on electrically programmable fuses
    8.
    发明授权
    Method and apparatus to monitor circuit variation effects on electrically programmable fuses 失效
    监测电可编程保险丝电路变化的方法和装置

    公开(公告)号:US07672185B2

    公开(公告)日:2010-03-02

    申请号:US11619287

    申请日:2007-01-03

    IPC分类号: G11C17/18

    CPC分类号: G11C17/18

    摘要: A monitor bank consists of test one time programmable memory that is programmed distinctively from functional one time programmable memory in order to determine whether the functional one time programmable memory has or will program successfully. In a specific embodiment, each monitor bank consists of a first eFuse configured to expectedly never blow, a second eFuse configured to expectedly always blow, and at least a third eFuse configured to be more difficult to blow than the first eFuse, but easier to blow than the second eFuse. The method of determining whether functional eFuses have or will be programmed successfully is described: programming a monitor bank; sensing whether the test eFuses have blown; creating a monitor bank bit line blow pattern; determining an anticipated bit line blow pattern; comparing the two patterns; and determining that the functional eFuses will not blow successfully if the patterns do not match.

    摘要翻译: 监视器组包括测试一次可编程存储器,其与功能一次可编程存储器区分开来,以确定功能一次可编程存储器是否具有或将成功编程。 在具体实施例中,每个监视器组包括被配置为预期不会吹动的第一eFuse,被配置为预期总是吹动的第二eFuse,以及被配置为比第一eFuse更难吹击的至少第三eFuse,但是更容易吹 比第二个eFuse。 描述了确定功能性eFuse是否具有或将被编程成功的方法:编程监视器组; 感测测试eFuses是否已经被吹; 创建监控银行位线打击模式; 确定预期的位线打击模式; 比较两种模式; 并且如果模式不匹配,则确定功能eFuses不会成功地吹奏。

    Power Supply Current Spike Reduction Techniques for an Integrated Circuit
    9.
    发明申请
    Power Supply Current Spike Reduction Techniques for an Integrated Circuit 失效
    用于集成电路的电源电流尖峰抑制技术

    公开(公告)号:US20090183019A1

    公开(公告)日:2009-07-16

    申请号:US12013928

    申请日:2008-01-14

    IPC分类号: G06F1/08

    CPC分类号: G06F1/10

    摘要: An integrated circuit includes a first clock island, a second clock island, a clock generator, and a first programmable delay element. The first clock island is configured to receive a first clock signal. The second clock island is configured to receive a second clock signal. The clock generator is configured to provide a generated clock signal and the first and second clock signals are based on the generated clock signal. The first programmable delay element is coupled between the clock generator and the first clock island. The first programmable delay element is configured to receive the generated clock signal and provide the first clock signal. The integrated circuit is configured to account for a clock skew between the first and second clock signals when information is transferred between the first and second clock islands. In this manner, a predetermined amount of the clock skew may be introduced between the first and second clock signals to smear out, over time, instantaneous power supply current demands of respective logic within the first and second clock islands.

    摘要翻译: 集成电路包括第一时钟岛,第二时钟岛,时钟发生器和第一可编程延迟元件。 第一时钟岛被配置为接收第一时钟信号。 第二时钟岛被配置为接收第二时钟信号。 时钟发生器被配置为提供生成的时钟信号,并且第一和第二时钟信号基于所生成的时钟信号。 第一可编程延迟元件耦合在时钟发生器和第一时钟岛之间。 第一可编程延迟元件被配置为接收生成的时钟信号并提供第一时钟信号。 当信息在第一和第二时钟岛之间传送时,集成电路被配置为考虑第一和第二时钟信号之间的时钟偏移。 以这种方式,可以在第一和第二时钟信号之间引入预定量的时钟偏差,以随着时间推移在第一和第二时钟岛内的相应逻辑的瞬时电源电流需求。

    Method for forming a shielding structure for decoupling signal traces in
a semiconductor
    10.
    发明授权
    Method for forming a shielding structure for decoupling signal traces in a semiconductor 失效
    用于形成用于去耦半导体中的信号迹线的屏蔽结构的方法

    公开(公告)号:US5135889A

    公开(公告)日:1992-08-04

    申请号:US805874

    申请日:1991-12-09

    申请人: David H. Allen

    发明人: David H. Allen

    IPC分类号: H01L23/522

    摘要: A method for forming a semiconductor structure including parallel spaced conducting traces each physically separated by a grounding trace. The grounding traces are located in between the conducting traces to provide a shielding structure to diminish capacitive coupling between the conducting traces. At the same time, each conducting traces is capacitively coupled to each adjacent pair of grounding traces and the grounding traces are connected to a ground such as a grounded substrate. The grounding traces are formed on a different layer of the semiconductor structure from the conducting traces such that a layout area of the conducting traces is not affected.

    摘要翻译: 一种用于形成半导体结构的方法,该半导体结构包括每个物理上由接地迹线隔开的平行隔开的导电迹线。 接地迹线位于导电迹线之间,以提供屏蔽结构以减小导电迹线之间的电容耦合。 同时,每个导电迹线电容耦合到每个相邻的一对接地迹线,并且接地迹线连接到诸如接地基板的接地。 接地迹线形成在与导电迹线不同的半导体结构层上,使得导电迹线的布局面积不受影响。