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公开(公告)号：US10969546B2
公开(公告)日：2021-04-06
申请号：US16198251
申请日：2018-11-21
Applicant: Cisco Technology, Inc.
Inventor： Xunyuan Zhang , Vipulkumar K. Patel , Prakash B. Gothoskar
Abstract: A method of fabricating an optical apparatus comprises forming a first waveguide on a dielectric substrate. The first waveguide extends in a direction of an optical path. The first waveguide comprises a monocrystalline semiconductor material and is doped with a first conductivity type. The method further comprises depositing a first dielectric layer on the first waveguide, etching a first opening that extends at least partly through the first dielectric layer, and forming a second waveguide at least partly overlapping the first waveguide along the direction. The second waveguide is doped with a different, second conductivity type. Forming the second waveguide comprises depositing a monocrystalline semiconductor material on the first dielectric layer, whereby the first opening is filled with the deposited monocrystalline semiconductor material.
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公开(公告)号：US11906824B2
公开(公告)日：2024-02-20
申请号：US18177497
申请日：2023-03-02
Applicant: Cisco Technology, Inc.
Inventor： Xunyuan Zhang , Vipulkumar K. Patel , Prakash B. Gothoskar , Ming Gai Stanley Lo
IPC: G02F1/025
CPC classification number: G02F1/025 , G02F2202/104 , G02F2202/105
Abstract: Embodiments provide for an optical modulator, comprising: a lower guide, comprising: a lower hub, made of monocrystalline silicon; and a lower ridge, made of monocrystalline silicon that extends in a first direction from the lower hub; an upper guide, including: an upper hub; and an upper ridge, made of monocrystalline silicon that extends in a second direction, opposite of the first direction, from the upper hub and is aligned with the lower ridge; and a gate oxide layer separating the lower ridge from the upper ridge and defining a waveguide region with the lower guide and the upper guide.
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公开(公告)号：US11226505B2
公开(公告)日：2022-01-18
申请号：US16789317
申请日：2020-02-12
Applicant: Cisco Technology, Inc.
Inventor： Donald Adams , Prakash B. Gothoskar , Vipulkumar Patel , Mark Webster
Abstract: An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. When a voltage potential is created between the lower and upper waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) guide that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. In one embodiment, at least one of the waveguides includes a respective ridge portion aligned at a charge modulation region which may aid in confining the optical mode laterally (e.g., in the width direction) in the optical modulator. In another embodiment, ridge portions may be formed on both the lower and the upper waveguides. These ridge portions may be aligned in a vertical direction (e.g., a thickness direction) so that ridges overlap which may further improve optical efficiency by centering an optical mode in the charge modulation region.
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公开(公告)号：US11036069B2
公开(公告)日：2021-06-15
申请号：US16356982
申请日：2019-03-18
Applicant: Cisco Technology, Inc.
Inventor： Xunyuan Zhang , Vipulkumar K. Patel , Prakash B. Gothoskar , Ming Gai Stanley Lo
IPC: G02F1/025
Abstract: Embodiments provide for an optical modulator, comprising: a lower guide, comprising: a lower hub, made of monocrystalline silicon; and a lower ridge, made of monocrystalline silicon that extends in a first direction from the lower hub; an upper guide, including: an upper hub; and an upper ridge, made of monocrystalline silicon that extends in a second direction, opposite of the first direction, from the upper hub and is aligned with the lower ridge; and a gate oxide layer separating the lower ridge from the upper ridge and defining a waveguide region with the lower guide and the upper guide.
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公开(公告)号：US11886056B2
公开(公告)日：2024-01-30
申请号：US17456468
申请日：2021-11-24
Applicant: Cisco Technology, Inc.
Inventor： Donald Adams , Prakash B. Gothoskar , Vipulkumar Patel , Mark Webster
CPC classification number: G02F1/025 , G02B6/132 , G02B6/136 , G02F1/011 , G02F1/2257 , G02F1/0152
Abstract: An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. When a voltage potential is created between the lower and upper waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) guide that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. In one embodiment, at least one of the waveguides includes a respective ridge portion aligned at a charge modulation region which may aid in confining the optical mode laterally (e.g., in the width direction) in the optical modulator. In another embodiment, ridge portions may be formed on both the lower and the upper waveguides. These ridge portions may be aligned in a vertical direction (e.g., a thickness direction) so that ridges overlap which may further improve optical efficiency by centering an optical mode in the charge modulation region.
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Patent Agency Ranking
公开(公告)号：US11742451B2
公开(公告)日：2023-08-29
申请号：US17103792
申请日：2020-11-24
Applicant: Cisco Technology, Inc.
Inventor： Xunyuan Zhang , Li Li , Prakash B. Gothoskar , Soha Namnabat
IPC: H01L31/18 , H01L31/0368 , H01L31/105 , H01L31/036
CPC classification number: H01L31/1812 , H01L31/036 , H01L31/03682 , H01L31/105 , H01L31/1808 , H01L31/1892
Abstract: The embodiments of the present disclosure describe a stressed Ge PD and fabrications techniques for making the same. In one embodiment, a stressor material is deposited underneath an already formed Ge PD. To do so, wafer bonding can be used to bond the wafer containing the Ge PD to a second, handler wafer. Doing so provides support to remove the substrate of the wafer so that a stressor material (e.g., silicon nitride, diamond-like carbon, or silicon-germanium) can be disposed underneath the Ge PD. The stress material induces a stress or strain in the crystal lattice of the Ge which changes its bandgap and improves its responsivity.
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公开(公告)号：US11619838B2
公开(公告)日：2023-04-04
申请号：US17302632
申请日：2021-05-07
Applicant: Cisco Technology, Inc.
Inventor： Xunyuan Zhang , Vipulkumar K. Patel , Prakash B. Gothoskar , Ming Gai Stanley Lo
IPC: G02F1/025
Abstract: Embodiments provide for an optical modulator, comprising: a lower guide, comprising: a lower hub, made of monocrystalline silicon; and a lower ridge, made of monocrystalline silicon that extends in a first direction from the lower hub; an upper guide, including: an upper hub; and an upper ridge, made of monocrystalline silicon that extends in a second direction, opposite of the first direction, from the upper hub and is aligned with the lower ridge; and a gate oxide layer separating the lower ridge from the upper ridge and defining a waveguide region with the lower guide and the upper guide.
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公开(公告)号：US11042050B1
公开(公告)日：2021-06-22
申请号：US16708248
申请日：2019-12-09
Applicant: Cisco Technology, Inc.
Inventor： Yi Ho Lee , Ming Gai Stanley Lo , Vipulkumar K. Patel , Prakash B. Gothoskar
Abstract: Embodiments herein describe reverse biasing one or more PIN junctions formed in at least one layer of a PSR. The resulting electric fields in the PIN junctions overlap with the optical path of the optical signal and sweep away photo-generated hole-electron free carriers away. That is, the electric fields in the PIN junctions remove the free carriers from the path of the optical signal and reduces the population of the free carriers, thereby mitigating the negative impact of free-carrier absorption (FCA).
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公开(公告)号：US10598967B2
公开(公告)日：2020-03-24
申请号：US15615290
申请日：2017-06-06
Applicant: Cisco Technology, Inc.
Inventor： Donald Adams , Prakash B. Gothoskar , Vipulkumar Patel , Mark Webster
Abstract: An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. When a voltage potential is created between the lower and upper waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) guide that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. In one embodiment, at least one of the waveguides includes a respective ridge portion aligned at a charge modulation region which may aid in confining the optical mode laterally (e.g., in the width direction) in the optical modulator. In another embodiment, ridge portions may be formed on both the lower and the upper waveguides. These ridge portions may be aligned in a vertical direction (e.g., a thickness direction) so that ridges overlap which may further improve optical efficiency by centering an optical mode in the charge modulation region.
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公开(公告)号：US12092863B2
公开(公告)日：2024-09-17
申请号：US17451247
申请日：2021-10-18
Applicant: Cisco Technology, Inc.
Inventor： Yi Ho Lee , Tao Ling , Ravi S. Tummidi , Mark A. Webster , Prakash B. Gothoskar
CPC classification number: G02B6/12007 , H04L1/0071 , G02B2006/12107 , G02B2006/12164 , G02B6/29352 , G02B6/29386
Abstract: Fabrication-tolerant on-chip multiplexers and demultiplexers are provides via a lattice filter interleaver configured to receive an input signal including a plurality of individual signals and to produce a first interleaved signal with a first subset of the plurality of individual signals and a second interleaved signal with a second subset of the plurality of individual signals; a first Bragg interleaver configured to receive the first interleaved signal and produce a first output signal including a first individual signal of the plurality of individual signals and a second output signal including a second individual signal of the plurality of individual signals; and a second Bragg interleaver configured to receive the second interleaved signal and produce a third output signal including a third individual signal of the plurality of individual signals and a fourth output signal including a fourth individual signal of the plurality of individual signals.
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