Phase Change Memory Device
    3.
    发明申请
    Phase Change Memory Device 审中-公开
    相变存储器件

    公开(公告)号:US20090230375A1

    公开(公告)日:2009-09-17

    申请号:US12049910

    申请日:2008-03-17

    IPC分类号: H01L45/00 H01L21/4763

    摘要: A semiconductor device is provided which includes a substrate having a dielectric layer formed thereon, a heating element formed in the dielectric layer, a phase change element formed on the heating element, and a conductive element formed on the phase change element. The phase change element includes a substantially amorphous background and an active region, the active region capable of changing phase between amorphous and crystalline.

    摘要翻译: 提供一种半导体器件,其包括其上形成有电介质层的衬底,形成在电介质层中的加热元件,形成在加热元件上的相变元件和形成在相变元件上的导电元件。 相变元件包括基本无定形的背景和有源区域,该有源区域能够改变无定形和晶态之间的相位。

    Phase change memory cell with roundless micro-trenches
    7.
    发明授权
    Phase change memory cell with roundless micro-trenches 有权
    具有圆形微沟槽的相变存储单元

    公开(公告)号:US07642170B2

    公开(公告)日:2010-01-05

    申请号:US11864719

    申请日:2007-09-28

    IPC分类号: H01L21/20

    摘要: A method for constructing a phase change memory device includes forming a first dielectric layer on a substrate; forming a first conductive component in the first dielectric layer; forming a second dielectric layer over the first conductive component in the first dielectric layer; forming a conductive crown in the second dielectric layer, the conductive crown being in contact and alignment with the conductive component; depositing a third dielectric layer in the conductive crown; and forming a trench filled with chalcogenic materials having an amorphous phase and a crystalline phase programmable by controlling a temperature thereof to represent logic states, wherein the trench extends across the conductive crown, such that the trench is free from a rounded end portion caused by lithography during fabrication of the phase change memory device.

    摘要翻译: 一种构造相变存储器件的方法包括:在衬底上形成第一电介质层; 在所述第一介电层中形成第一导电组分; 在所述第一介电层中的所述第一导电部件上形成第二电介质层; 在所述第二介电层中形成导电冠,所述导电冠与所述导电部件接触并对齐; 在导电冠中沉积第三电介质层; 并且形成填充有具有非晶相和结晶相的硫化物的沟槽,其可通过控制其温度来表示逻辑状态,其中所述沟槽延伸穿过所述导电冠,使得所述沟槽没有由光刻引起的圆形端部 在相变存储器件的制造过程中。